mirror of https://github.com/YosysHQ/yosys.git
Merge branch 'master' into firrtl+modules+shiftfixes
This commit is contained in:
commit
e217c6c52f
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@ -2,6 +2,8 @@
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*.d
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.*.swp
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*.gch
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*.gcda
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*.gcno
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/.cproject
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/.project
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/.settings
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@ -10,6 +12,8 @@
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/qtcreator.config
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/qtcreator.creator
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/qtcreator.creator.user
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/coverage.info
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/coverage_html
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/Makefile.conf
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/abc
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/viz.js
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21
Makefile
21
Makefile
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@ -19,6 +19,7 @@ ENABLE_LIBYOSYS := 0
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ENABLE_PROTOBUF := 0
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# other configuration flags
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ENABLE_GCOV := 0
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ENABLE_GPROF := 0
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ENABLE_DEBUG := 0
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ENABLE_NDEBUG := 0
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@ -158,7 +159,7 @@ ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H"
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else ifeq ($(CONFIG),gcc-static)
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LD = $(CXX)
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LDFLAGS := $(filter-out -rdynamic,$(LDFLAGS)) -s
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LDFLAGS := $(filter-out -rdynamic,$(LDFLAGS)) -static
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LDLIBS := $(filter-out -lrt,$(LDLIBS))
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CXXFLAGS := $(filter-out -fPIC,$(CXXFLAGS))
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CXXFLAGS += -std=c++11 -Os
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@ -312,6 +313,11 @@ endif
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endif
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endif
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ifeq ($(ENABLE_GCOV),1)
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CXXFLAGS += --coverage
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LDFLAGS += --coverage
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endif
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ifeq ($(ENABLE_GPROF),1)
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CXXFLAGS += -pg
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LDFLAGS += -pg
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@ -644,6 +650,12 @@ clean-abc:
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mrproper: clean
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git clean -xdf
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coverage:
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./yosys -qp 'help; help -all'
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rm -rf coverage.info coverage_html
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lcov --capture -d . --no-external -o coverage.info
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genhtml coverage.info --output-directory coverage_html
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qtcreator:
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{ for file in $(basename $(OBJS)); do \
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for prefix in cc y l; do if [ -f $${file}.$${prefix} ]; then echo $$file.$${prefix}; fi; done \
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@ -709,6 +721,11 @@ config-msys2: clean
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config-msys2-64: clean
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echo 'CONFIG := msys2-64' > Makefile.conf
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config-gcov: clean
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echo 'CONFIG := gcc' > Makefile.conf
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echo 'ENABLE_GCOV := 1' >> Makefile.conf
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echo 'ENABLE_DEBUG := 1' >> Makefile.conf
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config-gprof: clean
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echo 'CONFIG := gcc' > Makefile.conf
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echo 'ENABLE_GPROF := 1' >> Makefile.conf
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@ -729,6 +746,6 @@ echo-git-rev:
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-include kernel/*.d
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-include techlibs/*/*.d
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.PHONY: all top-all abc test install install-abc manual clean mrproper qtcreator
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.PHONY: all top-all abc test install install-abc manual clean mrproper qtcreator coverage vcxsrc mxebin
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.PHONY: config-clean config-clang config-gcc config-gcc-static config-gcc-4.8 config-gprof config-sudo
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@ -44,7 +44,7 @@ namespace AST {
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// instanciate global variables (private API)
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namespace AST_INTERNAL {
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bool flag_dump_ast1, flag_dump_ast2, flag_dump_vlog, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
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bool flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
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bool flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_autowire;
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AstNode *current_ast, *current_ast_mod;
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std::map<std::string, AstNode*> current_scope;
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@ -267,10 +267,12 @@ void AstNode::dumpAst(FILE *f, std::string indent) const
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std::string type_name = type2str(type);
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fprintf(f, "%s%s <%s:%d>", indent.c_str(), type_name.c_str(), filename.c_str(), linenum);
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if (id2ast)
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fprintf(f, " [%p -> %p]", this, id2ast);
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else
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fprintf(f, " [%p]", this);
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if (!flag_no_dump_ptr) {
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if (id2ast)
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fprintf(f, " [%p -> %p]", this, id2ast);
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else
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fprintf(f, " [%p]", this);
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}
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if (!str.empty())
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fprintf(f, " str='%s'", str.c_str());
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@ -1008,12 +1010,13 @@ static AstModule* process_module(AstNode *ast, bool defer)
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}
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// create AstModule instances for all modules in the AST tree and add them to 'design'
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void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool dump_vlog, bool dump_rtlil,
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void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog, bool dump_rtlil,
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bool nolatches, bool nomeminit, bool nomem2reg, bool mem2reg, bool lib, bool noopt, bool icells, bool nooverwrite, bool overwrite, bool defer, bool autowire)
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{
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current_ast = ast;
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flag_dump_ast1 = dump_ast1;
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flag_dump_ast2 = dump_ast2;
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flag_no_dump_ptr = no_dump_ptr;
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flag_dump_vlog = dump_vlog;
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flag_dump_rtlil = dump_rtlil;
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flag_nolatches = nolatches;
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@ -274,7 +274,7 @@ namespace AST
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};
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// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code
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void process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool dump_vlog, bool dump_rtlil, bool nolatches, bool nomeminit,
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void process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog, bool dump_rtlil, bool nolatches, bool nomeminit,
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bool nomem2reg, bool mem2reg, bool lib, bool noopt, bool icells, bool nooverwrite, bool overwrite, bool defer, bool autowire);
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// parametric modules are supported directly by the AST library
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@ -305,7 +305,7 @@ namespace AST
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namespace AST_INTERNAL
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{
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// internal state variables
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extern bool flag_dump_ast1, flag_dump_ast2, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
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extern bool flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
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extern bool flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_autowire;
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extern AST::AstNode *current_ast, *current_ast_mod;
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extern std::map<std::string, AST::AstNode*> current_scope;
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@ -1,4 +1,4 @@
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ilang_lexer.cc
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ilang_parser.output
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ilang_parser.tab.cc
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ilang_parser.tab.h
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ilang_parser.tab.hh
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@ -1,15 +1,14 @@
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GENFILES += frontends/ilang/ilang_parser.tab.cc
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GENFILES += frontends/ilang/ilang_parser.tab.h
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GENFILES += frontends/ilang/ilang_parser.tab.hh
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GENFILES += frontends/ilang/ilang_parser.output
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GENFILES += frontends/ilang/ilang_lexer.cc
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frontends/ilang/ilang_parser.tab.cc: frontends/ilang/ilang_parser.y
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$(Q) mkdir -p $(dir $@)
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$(P) $(BISON) -d -r all -b frontends/ilang/ilang_parser $<
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$(Q) mv frontends/ilang/ilang_parser.tab.c frontends/ilang/ilang_parser.tab.cc
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$(P) $(BISON) -o $@ -d -r all -b frontends/ilang/ilang_parser $<
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frontends/ilang/ilang_parser.tab.h: frontends/ilang/ilang_parser.tab.cc
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frontends/ilang/ilang_parser.tab.hh: frontends/ilang/ilang_parser.tab.cc
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frontends/ilang/ilang_lexer.cc: frontends/ilang/ilang_lexer.l
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$(Q) mkdir -p $(dir $@)
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@ -30,7 +30,7 @@
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#endif
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#include "frontends/ilang/ilang_frontend.h"
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#include "ilang_parser.tab.h"
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#include "ilang_parser.tab.hh"
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USING_YOSYS_NAMESPACE
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@ -1,4 +1,4 @@
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verilog_lexer.cc
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verilog_parser.output
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verilog_parser.tab.cc
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verilog_parser.tab.h
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verilog_parser.tab.hh
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|
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@ -1,15 +1,14 @@
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GENFILES += frontends/verilog/verilog_parser.tab.cc
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GENFILES += frontends/verilog/verilog_parser.tab.h
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GENFILES += frontends/verilog/verilog_parser.tab.hh
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GENFILES += frontends/verilog/verilog_parser.output
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GENFILES += frontends/verilog/verilog_lexer.cc
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frontends/verilog/verilog_parser.tab.cc: frontends/verilog/verilog_parser.y
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$(Q) mkdir -p $(dir $@)
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$(P) $(BISON) -d -r all -b frontends/verilog/verilog_parser $<
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$(Q) mv frontends/verilog/verilog_parser.tab.c frontends/verilog/verilog_parser.tab.cc
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$(P) $(BISON) -o $@ -d -r all -b frontends/verilog/verilog_parser $<
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frontends/verilog/verilog_parser.tab.h: frontends/verilog/verilog_parser.tab.cc
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frontends/verilog/verilog_parser.tab.hh: frontends/verilog/verilog_parser.tab.cc
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frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l
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$(Q) mkdir -p $(dir $@)
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|
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|
@ -78,6 +78,9 @@ struct VerilogFrontend : public Frontend {
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log(" -dump_ast2\n");
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log(" dump abstract syntax tree (after simplification)\n");
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log("\n");
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log(" -no_dump_ptr\n");
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log(" do not include hex memory addresses in dump (easier to diff dumps)\n");
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log("\n");
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log(" -dump_vlog\n");
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log(" dump ast as Verilog code (after simplification)\n");
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log("\n");
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|
@ -184,6 +187,7 @@ struct VerilogFrontend : public Frontend {
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{
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bool flag_dump_ast1 = false;
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bool flag_dump_ast2 = false;
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bool flag_no_dump_ptr = false;
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bool flag_dump_vlog = false;
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bool flag_dump_rtlil = false;
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bool flag_nolatches = false;
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|
@ -241,6 +245,10 @@ struct VerilogFrontend : public Frontend {
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flag_dump_ast2 = true;
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continue;
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}
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if (arg == "-no_dump_ptr") {
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flag_no_dump_ptr = true;
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continue;
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}
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if (arg == "-dump_vlog") {
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flag_dump_vlog = true;
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continue;
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|
@ -381,7 +389,7 @@ struct VerilogFrontend : public Frontend {
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if (flag_nodpi)
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error_on_dpi_function(current_ast);
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AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_dump_vlog, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire);
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AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire);
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|
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if (!flag_nopp)
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delete lexin;
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|
|
|
@ -42,7 +42,7 @@
|
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#include "kernel/log.h"
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#include "frontends/verilog/verilog_frontend.h"
|
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#include "frontends/ast/ast.h"
|
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#include "verilog_parser.tab.h"
|
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#include "verilog_parser.tab.hh"
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|
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USING_YOSYS_NAMESPACE
|
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using namespace AST;
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|
|
|
@ -654,7 +654,7 @@ specify_item:
|
|||
// | pulsestyle_declaration
|
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// | showcancelled_declaration
|
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| path_declaration
|
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// | system_timing_declaration
|
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| system_timing_declaration
|
||||
;
|
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|
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specparam_declaration:
|
||||
|
@ -682,22 +682,23 @@ showcancelled_declaration :
|
|||
*/
|
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|
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path_declaration :
|
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simple_path_declaration
|
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simple_path_declaration ';'
|
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// | edge_sensitive_path_declaration
|
||||
// | state_dependent_path_declaration
|
||||
;
|
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|
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simple_path_declaration :
|
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parallel_path_description '=' path_delay_value ';'
|
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// | full_path_description '=' path_delay_value ';'
|
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parallel_path_description '=' path_delay_value |
|
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full_path_description '=' path_delay_value
|
||||
;
|
||||
|
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path_delay_value :
|
||||
//list_of_path_delay_expressions
|
||||
'(' list_of_path_delay_expressions ')'
|
||||
'(' path_delay_expression list_of_path_delay_extra_expressions ')'
|
||||
| path_delay_expression
|
||||
| path_delay_expression list_of_path_delay_extra_expressions
|
||||
;
|
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|
||||
list_of_path_delay_expressions :
|
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list_of_path_delay_extra_expressions :
|
||||
/*
|
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t_path_delay_expression
|
||||
| trise_path_delay_expression ',' tfall_path_delay_expression
|
||||
|
@ -709,12 +710,11 @@ list_of_path_delay_expressions :
|
|||
t0x_path_delay_expression ',' tx1_path_delay_expression ',' t1x_path_delay_expression ','
|
||||
tx0_path_delay_expression ',' txz_path_delay_expression ',' tzx_path_delay_expression
|
||||
*/
|
||||
path_delay_expression
|
||||
| path_delay_expression ',' path_delay_expression
|
||||
| path_delay_expression ',' path_delay_expression ',' path_delay_expression
|
||||
| path_delay_expression ',' path_delay_expression ',' path_delay_expression ','
|
||||
',' path_delay_expression
|
||||
| ',' path_delay_expression ',' path_delay_expression
|
||||
| ',' path_delay_expression ',' path_delay_expression ','
|
||||
path_delay_expression ',' path_delay_expression ',' path_delay_expression
|
||||
| path_delay_expression ',' path_delay_expression ',' path_delay_expression ','
|
||||
| ',' path_delay_expression ',' path_delay_expression ','
|
||||
path_delay_expression ',' path_delay_expression ',' path_delay_expression ','
|
||||
path_delay_expression ',' path_delay_expression ',' path_delay_expression ','
|
||||
path_delay_expression ',' path_delay_expression ',' path_delay_expression
|
||||
|
@ -723,6 +723,22 @@ list_of_path_delay_expressions :
|
|||
parallel_path_description :
|
||||
'(' specify_input_terminal_descriptor opt_polarity_operator '=' '>' specify_output_terminal_descriptor ')' ;
|
||||
|
||||
full_path_description :
|
||||
'(' list_of_path_inputs '*' '>' list_of_path_outputs ')' ;
|
||||
|
||||
// This was broken into 2 rules to solve shift/reduce conflicts
|
||||
list_of_path_inputs :
|
||||
specify_input_terminal_descriptor opt_polarity_operator |
|
||||
specify_input_terminal_descriptor more_path_inputs opt_polarity_operator ;
|
||||
|
||||
more_path_inputs :
|
||||
',' specify_input_terminal_descriptor |
|
||||
more_path_inputs ',' specify_input_terminal_descriptor ;
|
||||
|
||||
list_of_path_outputs :
|
||||
specify_output_terminal_descriptor |
|
||||
list_of_path_outputs ',' specify_output_terminal_descriptor ;
|
||||
|
||||
opt_polarity_operator :
|
||||
'+'
|
||||
| '-'
|
||||
|
@ -736,10 +752,17 @@ specify_input_terminal_descriptor :
|
|||
specify_output_terminal_descriptor :
|
||||
TOK_ID ;
|
||||
|
||||
/*
|
||||
system_timing_declaration :
|
||||
;
|
||||
*/
|
||||
TOK_ID '(' system_timing_args ')' ';' ;
|
||||
|
||||
system_timing_arg :
|
||||
TOK_POSEDGE TOK_ID |
|
||||
TOK_NEGEDGE TOK_ID |
|
||||
expr ;
|
||||
|
||||
system_timing_args :
|
||||
system_timing_arg |
|
||||
system_timing_args ',' system_timing_arg ;
|
||||
|
||||
/*
|
||||
t_path_delay_expression :
|
||||
|
@ -792,7 +815,7 @@ tzx_path_delay_expression :
|
|||
*/
|
||||
|
||||
path_delay_expression :
|
||||
constant_mintypmax_expression;
|
||||
constant_expression;
|
||||
|
||||
constant_mintypmax_expression :
|
||||
constant_expression
|
||||
|
|
Loading…
Reference in New Issue