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In RTLIL::Module::check(), check process invariants.

This commit is contained in:
whitequark 2019-06-19 05:22:13 +00:00
parent 64947453e2
commit df6576edc8
1 changed files with 28 additions and 1 deletions
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29
kernel/rtlil.cc
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@ -1381,7 +1381,34 @@ void RTLIL::Module::check()
for (auto &it : processes) { for (auto &it : processes) {
log_assert(it.first == it.second->name); log_assert(it.first == it.second->name);
log_assert(!it.first.empty()); log_assert(!it.first.empty());
// FIXME: More checks here.. log_assert(it.second->root_case.compare.empty());
std::vector<CaseRule*> all_cases = {&it.second->root_case};
for (size_t i = 0; i < all_cases.size(); i++) {
for (auto &switch_it : all_cases[i]->switches) {
for (auto &case_it : switch_it->cases) {
for (auto &compare_it : case_it->compare) {
log_assert(switch_it->signal.size() == compare_it.size());
}
all_cases.push_back(case_it);
}
}
}
for (auto &sync_it : it.second->syncs) {
switch (sync_it->type) {
case SyncType::ST0:
case SyncType::ST1:
case SyncType::STp:
case SyncType::STn:
case SyncType::STe:
log_assert(!sync_it->signal.empty());
break;
case SyncType::STa:
case SyncType::STg:
case SyncType::STi:
log_assert(sync_it->signal.empty());
break;
}
}
} }
for (auto &it : connections_) { for (auto &it : connections_) {