mirror of https://github.com/YosysHQ/yosys.git
install *_nowide.lut files
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@ -13,6 +13,7 @@ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.box))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.box))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.lut))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.lut))
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$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g_nowide.lut))
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EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
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EXTRA_OBJS += techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
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.SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
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.SECONDARY: techlibs/ecp5/brams_init.mk techlibs/ecp5/brams_connect.mk
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@ -30,8 +30,10 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7_nowide.lut))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
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