mirror of https://github.com/YosysHQ/yosys.git
fix bugs in drivertools
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d90268f610
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dd5ec84a26
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@ -680,9 +680,9 @@ void DriverMap::add(DriveBit const &a, DriveBit const &b)
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// If either bit is just a wire that we don't need to keep, merge and
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// use the other end as representative bit.
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if (a_mode == BitMode::NONE)
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if (a_mode == BitMode::NONE && !(b_mode == BitMode::DRIVEN_UNIQUE || b_mode == BitMode::DRIVEN))
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connect_directed_merge(a_id, b_id);
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else if (b_mode == BitMode::NONE)
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else if (b_mode == BitMode::NONE && !(a_mode == BitMode::DRIVEN_UNIQUE || a_mode == BitMode::DRIVEN))
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connect_directed_merge(b_id, a_id);
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// If either bit requires a driven value and has a unique driver, merge
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// and use the other end as representative bit.
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@ -113,7 +113,7 @@ struct ExampleDtPass : public Pass
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node.append_arg(enqueue(driver));
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}
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} else {
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DriveChunkWire whole_wire(wire_chunk.wire, 0, wire_chunk.width);
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DriveChunkWire whole_wire(wire_chunk.wire, 0, wire_chunk.wire->width);
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node.set_function(ExampleFn(ID($$slice), {{ID(offset), wire_chunk.offset}, {ID(width), wire_chunk.width}}));
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node.append_arg(enqueue(whole_wire));
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}
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@ -145,7 +145,7 @@ struct ExampleDtPass : public Pass
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} else {
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DriveChunkPort whole_port(port_chunk.cell, port_chunk.port, 0, GetSize(port_chunk.cell->connections().at(port_chunk.port)));
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node.set_function(ID($$buf));
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node.set_function(ExampleFn(ID($$slice), {{ID(offset), port_chunk.offset}}));
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node.append_arg(enqueue(whole_port));
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}
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} else if (chunk.is_constant()) {
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