mirror of https://github.com/YosysHQ/yosys.git
Fixed "dff2dffe -direct-match"
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parent
3e9e6e1c22
commit
dc30b034f7
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@ -243,10 +243,12 @@ struct Dff2dffeWorker
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void run()
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{
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log("Transforming $dff to $dffe cells in module %s:\n", log_id(module));
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for (auto dff_cell : dff_cells)
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log("Transforming FF to FF+Enable cells in module %s:\n", log_id(module));
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for (auto dff_cell : dff_cells) {
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// log("Handling candidate %s:\n", log_id(dff_cell));
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handle_dff_cell(dff_cell);
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}
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}
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};
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struct Dff2dffePass : public Pass {
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@ -301,23 +303,32 @@ struct Dff2dffePass : public Pass {
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continue;
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}
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if (args[argidx] == "-direct-match" && argidx + 1 < args.size()) {
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bool found_match = false;
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const char *pattern = args[++argidx].c_str();
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if (patmatch(pattern, "$_DFF_P_" )) direct_dict["$_DFF_P_" ] = "$_DFFE_P_";
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if (patmatch(pattern, "$_DFF_N_" )) direct_dict["$_DFF_N_" ] = "$_DFFE_N_";
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if (patmatch(pattern, "$_DFF_NN0_")) direct_dict["$_DFF_NN0"] = "$__DFFE_NN0";
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if (patmatch(pattern, "$_DFF_NN1_")) direct_dict["$_DFF_NN1"] = "$__DFFE_NN1";
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if (patmatch(pattern, "$_DFF_NP0_")) direct_dict["$_DFF_NP0"] = "$__DFFE_NP0";
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if (patmatch(pattern, "$_DFF_NP1_")) direct_dict["$_DFF_NP1"] = "$__DFFE_NP1";
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if (patmatch(pattern, "$_DFF_PN0_")) direct_dict["$_DFF_PN0"] = "$__DFFE_PN0";
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if (patmatch(pattern, "$_DFF_PN1_")) direct_dict["$_DFF_PN1"] = "$__DFFE_PN1";
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if (patmatch(pattern, "$_DFF_PP0_")) direct_dict["$_DFF_PP0"] = "$__DFFE_PP0";
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if (patmatch(pattern, "$_DFF_PP1_")) direct_dict["$_DFF_PP1"] = "$__DFFE_PP1";
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if (patmatch(pattern, "$_DFF_P_" )) found_match = true, direct_dict["$_DFF_P_" ] = "$_DFFE_P_";
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if (patmatch(pattern, "$_DFF_N_" )) found_match = true, direct_dict["$_DFF_N_" ] = "$_DFFE_N_";
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if (patmatch(pattern, "$_DFF_NN0_")) found_match = true, direct_dict["$_DFF_NN0_"] = "$__DFFE_NN0";
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if (patmatch(pattern, "$_DFF_NN1_")) found_match = true, direct_dict["$_DFF_NN1_"] = "$__DFFE_NN1";
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if (patmatch(pattern, "$_DFF_NP0_")) found_match = true, direct_dict["$_DFF_NP0_"] = "$__DFFE_NP0";
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if (patmatch(pattern, "$_DFF_NP1_")) found_match = true, direct_dict["$_DFF_NP1_"] = "$__DFFE_NP1";
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if (patmatch(pattern, "$_DFF_PN0_")) found_match = true, direct_dict["$_DFF_PN0_"] = "$__DFFE_PN0";
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if (patmatch(pattern, "$_DFF_PN1_")) found_match = true, direct_dict["$_DFF_PN1_"] = "$__DFFE_PN1";
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if (patmatch(pattern, "$_DFF_PP0_")) found_match = true, direct_dict["$_DFF_PP0_"] = "$__DFFE_PP0";
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if (patmatch(pattern, "$_DFF_PP1_")) found_match = true, direct_dict["$_DFF_PP1_"] = "$__DFFE_PP1";
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if (!found_match)
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log_cmd_error("No cell types matched pattern '%s'.\n", pattern);
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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if (!direct_dict.empty()) {
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log("Selected cell types for direct conversion:\n");
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for (auto &it : direct_dict)
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log(" %s -> %s\n", log_id(it.first), log_id(it.second));
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}
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for (auto mod : design->selected_modules())
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if (!mod->has_processes_warn())
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{
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@ -72,6 +72,7 @@ struct SynthIce40Pass : public Pass {
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log(" map_ffs:\n");
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log(" dff2dffe -direct-match $_DFF_*\n");
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log(" techmap -map +/ice40/cells_map.v\n");
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log(" opt_const -mux_undef\n");
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log(" simplemap\n");
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log(" clean\n");
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log("\n");
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@ -145,6 +146,7 @@ struct SynthIce40Pass : public Pass {
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{
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Pass::call(design, "dff2dffe -direct-match $_DFF_*");
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Pass::call(design, "techmap -map +/ice40/cells_map.v");
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Pass::call(design, "opt_const -mux_undef");
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Pass::call(design, "simplemap");
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Pass::call(design, "clean");
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}
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