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verific: add option to skip simplifying complex ports

This commit is contained in:
Miodrag Milanovic 2024-01-30 16:33:44 +01:00
parent 3537976477
commit db1de5fe5d
1 changed files with 12 additions and 2 deletions
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10
frontends/verific/verific.cc
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@ -2815,6 +2815,9 @@ struct VerificPass : public Pass {
log(" -extnets\n");
log(" Resolve references to external nets by adding module ports as needed.\n");
log("\n");
log(" -no-split-complex-ports\n");
log(" Complex ports (structs or arrays) are not split and remain packed as a single port.\n");
log("\n");
log(" -autocover\n");
log(" Generate automatic cover statements for all asserts\n");
log("\n");
@ -3548,6 +3551,7 @@ struct VerificPass : public Pass {
bool mode_nosva = false, mode_names = false, mode_verific = false;
bool mode_autocover = false, mode_fullinit = false;
bool flatten = false, extnets = false, mode_cells = false;
bool split_complex_ports = true;
string dumpfile;
string ppfile;
Map parameters(STRING_HASH);
@ -3565,6 +3569,10 @@ struct VerificPass : public Pass {
flatten = true;
continue;
}
if (args[argidx] == "-no-split-complex-ports") {
split_complex_ports = false;
continue;
}
if (args[argidx] == "-extnets") {
extnets = true;
continue;
@ -3804,8 +3812,10 @@ struct VerificPass : public Pass {
worker.run(nl.second);
}
if (split_complex_ports) {
for (auto nl : nl_todo)
nl.second->ChangePortBusStructures(1 /* hierarchical */);
}
if (!dumpfile.empty()) {
VeriWrite veri_writer;