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Add test for subarray access on multidimensional arrays 

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
This commit is contained in:
Lukasz Dalek 2020-08-03 17:07:33 +02:00
parent ba08c25133
commit daee2d967f
1 changed files with 12 additions and 0 deletions
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12
tests/svtypes/multirange_subarray_access.ys Normal file
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logger -expect error "Insufficient number of array indices for a." 1
read_verilog -sv <<EOT
module foo;
logic a [6:0][4:0][1:0];
logic b [1:0];
assign a[0][0][0] = 1'b0;
assign a[0][0][1] = 1'b1;
assign b = a[0][0];
endmodule
EOT