mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #4455 from phsauter/shiftadd-limit-padding
peepopt: limit padding from shiftadd
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commit
dac5bd1983
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@ -25,6 +25,9 @@ PRIVATE_NAMESPACE_BEGIN
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bool did_something;
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// scratchpad configurations for pmgen
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int shiftadd_max_ratio;
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#include "passes/pmgen/peepopt_pm.h"
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struct PeepoptPass : public Pass {
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@ -50,6 +53,9 @@ struct PeepoptPass : public Pass {
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log("\n");
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log(" * shiftadd - Replace A>>(B+D) with (A'>>D)>>(B) where D is constant and\n");
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log(" A' is derived from A by padding or cutting inaccessible bits.\n");
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log(" Scratchpad: 'peepopt.shiftadd.max_data_multiple' (default: 2)\n");
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log(" limits the amount of padding to a multiple of the data, \n");
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log(" to avoid high resource usage from large temporary MUX trees.\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) override
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@ -63,6 +69,11 @@ struct PeepoptPass : public Pass {
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}
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extra_args(args, argidx, design);
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// limit the padding from shiftadd to a multiple of the input data
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// during techmap it creates (#data + #padding) * log(shift) $_MUX_ cells
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// 2x implies there is a constant shift larger than the input-data which should be extremely rare
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shiftadd_max_ratio = design->scratchpad_get_int("peepopt.shiftadd.max_data_multiple", 2);
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for (auto module : design->selected_modules())
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{
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did_something = true;
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@ -91,11 +91,21 @@ code
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// it should only differ if previous passes create invalid data
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log_assert(!(offset>0 && var_signed));
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SigSpec old_a = port(shift, \A); // data
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std::string location = shift->get_src_attribute();
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if(shiftadd_max_ratio>0 && offset<0 && -offset*shiftadd_max_ratio > old_a.size()) {
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log_warning("at %s: candiate for shiftadd optimization (shifting '%s' by '%s - %d' bits) "
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"was ignored to avoid high resource usage, see help peepopt\n",
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location.c_str(), log_signal(old_a), log_signal(var_signal), -offset);
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reject;
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}
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did_something = true;
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log("shiftadd pattern in %s: shift=%s, add/sub=%s, offset: %d\n", \
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log_id(module), log_id(shift), log_id(add), offset);
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SigSpec old_a = port(shift, \A), new_a;
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SigSpec new_a;
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if(offset<0) {
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// data >> (...-c) transformed to {data, c'X} >> (...)
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SigSpec padding( (shift->type.in($shiftx) ? State::Sx : State::S0), -offset );
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@ -107,14 +117,13 @@ code
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new_a.append(old_a.extract_end(offset));
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} else {
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// warn user in case data is empty (no bits left)
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std::string location = shift->get_src_attribute();
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if (location.empty())
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location = shift->name.str();
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if(shift->type.in($shiftx))
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log_warning("at %s: result of indexed part-selection is always constant (selecting from '%s' with index '%s + %d')\n", \
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location.c_str(), log_signal(old_a), log_signal(var_signal), offset);
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else
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log_warning("at %s: result of shift operation is always constant (shifting '%s' by '%s + %d'-bits)\n", \
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log_warning("at %s: result of shift operation is always constant (shifting '%s' by '%s + %d' bits)\n", \
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location.c_str(), log_signal(old_a), log_signal(var_signal), offset);
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}
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}
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