riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

improved $mux optimization in opt_const

This commit is contained in:
Clifford Wolf 2013-03-19 13:32:39 +01:00
parent b7fcf1fb9a
commit d8a7fa6b67
1 changed files with 6 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
passes/opt/opt_const.cc
View File

@ -242,11 +242,15 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module)
FOLD_1ARG_CELL(pos)
FOLD_1ARG_CELL(neg)
// be very conservative with optimizing $mux cells as we do not want to break mux trees
if (cell->type == "$mux") {
RTLIL::SigSpec input = cell->connections["\\S"];
assign_map.apply(input);
RTLIL::SigSpec input = assign_map(cell->connections["\\S"]);
RTLIL::SigSpec inA = assign_map(cell->connections["\\A"]);
RTLIL::SigSpec inB = assign_map(cell->connections["\\B"]);
if (input.is_fully_const())
ACTION_DO("\\Y", input.as_bool() ? cell->connections["\\B"] : cell->connections["\\A"]);
else if (inA == inB)
ACTION_DO("\\Y", cell->connections["\\A"]);
}
next_cell:;