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Merge remote-tracking branch 'origin/master' into xaig_arrival

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Eddie Hung 2019-08-30 10:32:58 -07:00
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@ -330,7 +330,7 @@ Verilog Attributes and non-standard features
- The ``parameter`` and ``localparam`` attributes are used to mark wires
that represent module parameters or localparams (when the HDL front-end
is run in -pwires mode).
is run in ``-pwires`` mode).
- The ``clkbuf_driver`` attribute can be set on an output port of a blackbox
module to mark it as a clock buffer output, and thus prevent ``clkbufmap``