riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Use new peepopt from #969

This commit is contained in:
Eddie Hung 2019-05-02 11:35:57 -07:00
parent 8829cba901
commit d80445e049
1 changed files with 15 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
techlibs/xilinx/synth_xilinx.cc
View File

@ -211,6 +211,18 @@ struct SynthXilinxPass : public ScriptPass
if (check_label("coarse")) {
run("synth -run coarse");
// shregmap -tech xilinx can cope with $shiftx and $mux
// cells for identifying variable-length shift registers,
// so attempt to convert $pmux-es to the former
// Also: wide multiplexer inference benefits from this too
if ((!nosrl && !nomux) || help_mode)
run("pmux2shiftx", "(skip if '-nosrl' and '-nomux')");
// Run a number of peephole optimisations, including one
// that optimises $mul cells driving $shiftx's B input
// and that aids wide mux analysis
run("peepopt");
}
if (check_label("bram", "(skip if '-nobram')")) {
@ -228,13 +240,6 @@ struct SynthXilinxPass : public ScriptPass
}
if (check_label("fine")) {
// shregmap -tech xilinx can cope with $shiftx and $mux
// cells for identifying variable-length shift registers,
// so attempt to convert $pmux-es to the former
// Also: wide multiplexer inference benefits from this too
if ((!nosrl && !nomux) || help_mode)
run("pmux2shiftx", "(skip if '-nosrl' and '-nomux')");
run("opt -fast -full");
run("memory_map");
run("dffsr2dff");
@ -246,6 +251,9 @@ struct SynthXilinxPass : public ScriptPass
else if (!nocarry || help_mode)
run("techmap -map +/xilinx/arith_map.v", "(skip if '-nocarry')");
if (!nomux || help_mode)
run("techmap -map +/xilinx/cells_map.v");
if (!nosrl || help_mode) {
// shregmap operates on bit-level flops, not word-level,
// so break those down here
@ -254,9 +262,6 @@ struct SynthXilinxPass : public ScriptPass
run("shregmap -tech xilinx -minlen 3", "(skip if '-nosrl')");
}
if (!nomux || help_mode)
run("techmap -map +/xilinx/cells_map.v");
run("techmap");
run("opt -fast");
}