mirror of https://github.com/YosysHQ/yosys.git
gowin: add a new type of PLL - PLLVR
This primitive is used in the GW1NS-4, GW1NS-4C, GW1NSR-4, GW1NSR-4C and GW1NSER-4C chips. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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@ -1552,6 +1552,53 @@ parameter DEVICE = "GW1N-1"; // "GW1N-1", "GW1N-4", "GW1N-9", "GW1NR-4",
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endmodule
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(* blackbox *)
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module PLLVR (CLKOUT, CLKOUTP, CLKOUTD, CLKOUTD3, LOCK, CLKIN, CLKFB, FBDSEL, IDSEL, ODSEL, DUTYDA, PSDA, FDLY, RESET, RESET_P, VREN);
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input CLKIN;
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input CLKFB;
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input RESET;
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input RESET_P;
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input [5:0] FBDSEL;
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input [5:0] IDSEL;
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input [5:0] ODSEL;
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input [3:0] PSDA,FDLY;
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input [3:0] DUTYDA;
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input VREN;
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output CLKOUT;
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output LOCK;
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output CLKOUTP;
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output CLKOUTD;
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output CLKOUTD3;
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parameter FCLKIN = "100.0"; // frequency of CLKIN
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parameter DYN_IDIV_SEL= "false"; // true:IDSEL, false:IDIV_SEL
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parameter IDIV_SEL = 0; // 0:1, 1:2 ... 63:64
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parameter DYN_FBDIV_SEL= "false"; // true:FBDSEL, false:FBDIV_SEL
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parameter FBDIV_SEL = 0; // 0:1, 1:2 ... 63:64
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parameter DYN_ODIV_SEL= "false"; // true:ODSEL, false:ODIV_SEL
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parameter ODIV_SEL = 8; // 2/4/8/16/32/48/64/80/96/112/128
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parameter PSDA_SEL= "0000";
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parameter DYN_DA_EN = "false"; // true:PSDA or DUTYDA or FDA, false: DA_SEL
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parameter DUTYDA_SEL= "1000";
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parameter CLKOUT_FT_DIR = 1'b1; // CLKOUT fine tuning direction. 1'b1 only
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parameter CLKOUTP_FT_DIR = 1'b1; // 1'b1 only
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parameter CLKOUT_DLY_STEP = 0; // 0, 1, 2, 4
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parameter CLKOUTP_DLY_STEP = 0; // 0, 1, 2
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parameter CLKFB_SEL = "internal"; // "internal", "external"
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parameter CLKOUT_BYPASS = "false"; // "true", "false"
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parameter CLKOUTP_BYPASS = "false"; // "true", "false"
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parameter CLKOUTD_BYPASS = "false"; // "true", "false"
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parameter DYN_SDIV_SEL = 2; // 2~128, only even numbers
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parameter CLKOUTD_SRC = "CLKOUT"; // CLKOUT, CLKOUTP
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parameter CLKOUTD3_SRC = "CLKOUT"; // CLKOUT, CLKOUTP
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parameter DEVICE = "GW1NS-4"; // "GW1NS-4", "GW1NS-4C", "GW1NSR-4", "GW1NSR-4C", "GW1NSER-4C"
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endmodule
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(* blackbox *)
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module OSC(OSCOUT);
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output OSCOUT;
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