mirror of https://github.com/YosysHQ/yosys.git
Bugfix in parsing of BLIF latch init values
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@ -241,7 +241,7 @@ void parse_blif(RTLIL::Design *design, std::istream &f, std::string dff_name, bo
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}
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if (init != nullptr && (init[0] == '0' || init[0] == '1'))
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blif_wire(d)->attributes["\\init"] = Const(init[0] == '1' ? 1 : 0, 1);
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blif_wire(q)->attributes["\\init"] = Const(init[0] == '1' ? 1 : 0, 1);
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if (clock == nullptr)
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goto no_latch_clock;
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