mirror of https://github.com/YosysHQ/yosys.git
parent
3b97b612fe
commit
d55790909c
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@ -238,24 +238,15 @@ struct SetundefPass : public Pass {
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{
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{
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if (params_mode)
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if (params_mode)
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{
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{
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for (auto *cell : module->cells())
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for (auto *cell : module->selected_cells()) {
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{
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for (auto ¶meter : cell->parameters) {
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// Only modify selected cells.
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if (!design->selected(module, it)) {
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continue;
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}
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for (auto ¶meter : cell->parameters)
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{
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for (auto &bit : parameter.second.bits) {
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for (auto &bit : parameter.second.bits) {
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if (bit > RTLIL::State::S1)
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if (bit > RTLIL::State::S1)
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{
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bit = worker.next_bit();
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bit = worker.next_bit();
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}
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}
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}
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}
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}
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}
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}
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}
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}
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if (undriven_mode)
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if (undriven_mode)
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{
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{
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