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Do not collect disabled $memwr cells

This commit is contained in:
Clifford Wolf 2015-07-06 13:28:00 +02:00
parent c4dde71dca
commit d2ff5d9994
1 changed files with 16 additions and 13 deletions
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3
passes/memory/memory_collect.cc
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@ -110,6 +110,8 @@ void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory)
SigSpec data = sigmap(cell->getPort("\\DATA"));
SigSpec en = sigmap(cell->getPort("\\EN"));
if (!en.is_fully_zero())
{
clk.extend_u0(1, false);
clk_enable.extend_u0(1, false);
clk_polarity.extend_u0(1, false);
@ -125,6 +127,7 @@ void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory)
sig_wr_en.append(en);
wr_ports++;
}
continue;
}