From d0cd01adfe11fd69985785d5888d4a1181c3715c Mon Sep 17 00:00:00 2001 From: C77874 Date: Thu, 4 Jul 2024 09:33:58 -0700 Subject: [PATCH] fixed typos, build with makefile succeeds --- passes/pmgen/Makefile.inc | 2 +- techlibs/microchip/Makefile.inc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/passes/pmgen/Makefile.inc b/passes/pmgen/Makefile.inc index ef6bffb11..84d9ebaf1 100644 --- a/passes/pmgen/Makefile.inc +++ b/passes/pmgen/Makefile.inc @@ -37,7 +37,7 @@ $(eval $(call add_extra_objs,passes/pmgen/xilinx_dsp_cascade_pm.h)) # -------------------------------------- -OBJS += passes/pmgen/microvhip.o +OBJS += passes/pmgen/microchip_dsp.o GENFILES += passes/pmgen/microchip_dsp_pm.h GENFILES += passes/pmgen/microchip_dsp_CREG_pm.h GENFILES += passes/pmgen/microchip_dsp_cascade_pm.h diff --git a/techlibs/microchip/Makefile.inc b/techlibs/microchip/Makefile.inc index f6f34ccd3..b1905e2cf 100644 --- a/techlibs/microchip/Makefile.inc +++ b/techlibs/microchip/Makefile.inc @@ -22,7 +22,7 @@ OBJS += techlibs/microchip/microchip_dffopt.o $(eval $(call add_share_file,share/microchip,techlibs/microchip/arith_map.v)) $(eval $(call add_share_file,share/microchip,techlibs/microchip/cells_map.v)) $(eval $(call add_share_file,share/microchip,techlibs/microchip/cells_sim.v)) -$(eval $(call add_share_file,share/microchip,techlibs/microchip/pf_dsp_map.v)) +$(eval $(call add_share_file,share/microchip,techlibs/microchip/polarfire_dsp_map.v)) $(eval $(call add_share_file,share/microchip,techlibs/microchip/brams_defs.vh)) $(eval $(call add_share_file,share/microchip,techlibs/microchip/LSRAM_map.v))