mirror of https://github.com/YosysHQ/yosys.git
Add xilinx_srl_fixed, fix typos
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@ -28,6 +28,7 @@ bool did_something;
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#include "passes/pmgen/test_pmgen_pm.h"
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#include "passes/pmgen/ice40_dsp_pm.h"
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#include "passes/pmgen/xilinx_srl_pm.h"
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#include "passes/pmgen/peepopt_pm.h"
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void reduce_chain(test_pmgen_pm &pm)
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@ -180,7 +181,7 @@ void generate_pattern(std::function<void(pm&,std::function<void()>)> run, const
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while (modcnt < maxmodcnt && submodcnt < maxsubcnt && itercnt++ < 1000)
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{
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if (timeout++ > 10000)
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log_error("pmgen generator is stuck: 10000 iterations an no matching module generated.\n");
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log_error("pmgen generator is stuck: 10000 iterations with no matching module generated.\n");
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pm matcher(mod, mod->cells());
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@ -349,13 +350,16 @@ struct TestPmgenPass : public Pass {
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if (pattern == "ice40_dsp")
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return GENERATE_PATTERN(ice40_dsp_pm, ice40_dsp);
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if (pattern == "xilinx_srl_fixed")
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return GENERATE_PATTERN(xilinx_srl_pm, fixed);
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if (pattern == "peepopt-muldiv")
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return GENERATE_PATTERN(peepopt_pm, muldiv);
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if (pattern == "peepopt-shiftmul")
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return GENERATE_PATTERN(peepopt_pm, shiftmul);
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log_cmd_error("Unkown pattern: %s\n", pattern.c_str());
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log_cmd_error("Unknown pattern: %s\n", pattern.c_str());
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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