mirror of https://github.com/YosysHQ/yosys.git
changed references from hash-ids to IdString names
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a27fa1833e
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ccb4dcd013
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@ -3,6 +3,11 @@
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#include "yosys.h"
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#include <boost/python.hpp>
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struct YosysDesign;
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struct YosysModule;
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struct YosysCell;
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struct YosysWire;
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void yosys_setup()
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{
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Yosys::log_streams.push_back(&std::cout);
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@ -24,16 +29,13 @@ void yosys_shutdown()
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struct YosysCell
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{
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unsigned int hashid;
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YosysCell(unsigned int hashid)
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{
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this->hashid = hashid;
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}
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Yosys::RTLIL::IdString name;
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Yosys::RTLIL::IdString parent_name;
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YosysCell(Yosys::RTLIL::Cell* ref)
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{
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this->hashid = ref->hashidx_;
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this->name = ref->name;
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this->parent_name = ref->module->name;
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}
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Yosys::RTLIL::Cell* get_cpp_obj()
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@ -41,34 +43,27 @@ struct YosysCell
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Yosys::RTLIL::Design* active_design = Yosys::yosys_get_design();
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if(active_design == NULL)
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return NULL;
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for(auto &mod_it : active_design->modules_)
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{
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for(auto &cell_it : mod_it.second->cells_)
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if(cell_it.second->hashidx_ == this->hashid)
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return cell_it.second;
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}
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return NULL;
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if(active_design->modules_[this->parent_name] == NULL)
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return NULL;
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return active_design->modules_[this->parent_name]->cells_[this->name];
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}
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};
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std::ostream &operator<<(std::ostream &ostr, const YosysCell &cell)
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{
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ostr << "Cell with id " << cell.hashid;
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ostr << "Cell with name " << cell.name.c_str();
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return ostr;
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}
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struct YosysWire
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{
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unsigned int hashid;
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YosysWire(unsigned int hashid)
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{
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this->hashid = hashid;
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}
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Yosys::RTLIL::IdString name;
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Yosys::RTLIL::IdString parent_name;
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YosysWire(Yosys::RTLIL::Wire* ref)
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{
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this->hashid = ref->hashidx_;
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this->name = ref->name;
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this->parent_name = ref->module->name;
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}
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Yosys::RTLIL::Wire* get_cpp_obj()
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@ -76,35 +71,27 @@ struct YosysWire
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Yosys::RTLIL::Design* active_design = Yosys::yosys_get_design();
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if(active_design == NULL)
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return NULL;
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for(auto &mod_it : active_design->modules_)
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{
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for(auto &wire_it : mod_it.second->wires_)
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if(wire_it.second->hashidx_ == this->hashid)
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return wire_it.second;
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}
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return NULL;
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if(active_design->modules_[this->parent_name] == NULL)
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return NULL;
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return active_design->modules_[this->parent_name]->wires_[this->name];
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}
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};
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std::ostream &operator<<(std::ostream &ostr, const YosysWire &wire)
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{
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ostr << "Wire with id " << wire.hashid;
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ostr << "Wire with name " << wire.name.c_str();
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return ostr;
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}
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struct YosysModule
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{
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unsigned int hashid;
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YosysModule(unsigned int hashid)
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{
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this->hashid = hashid;
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}
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Yosys::RTLIL::IdString name;
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unsigned int parent_hashid;
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YosysModule(Yosys::RTLIL::Module* ref)
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{
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this->hashid = ref->hashidx_;
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this->name = ref->name;
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this->parent_hashid = ref->design->hashidx_;
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}
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Yosys::RTLIL::Module* get_cpp_obj()
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@ -112,12 +99,9 @@ struct YosysModule
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Yosys::RTLIL::Design* active_design = Yosys::yosys_get_design();
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if(active_design == NULL)
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return NULL;
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for(auto &mod_it : active_design->modules_)
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{
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if(mod_it.second->hashidx_ == this->hashid)
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return mod_it.second;
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}
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return NULL;
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if(active_design->hashidx_ != this->parent_hashid)
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printf("Somehow the active design changed!\n");
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return active_design->modules_[this->name];
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}
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boost::python::list get_cells()
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@ -149,7 +133,7 @@ struct YosysModule
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std::ostream &operator<<(std::ostream &ostr, const YosysModule &module)
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{
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ostr << "Module with id " << module.hashid;
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ostr << "Module with name " << module.name.c_str();
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return ostr;
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}
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@ -169,22 +153,6 @@ struct YosysDesign
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{
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printf("design is not null and has id %u\n", active_design->hashidx_);
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this->hashid = active_design->hashidx_;
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/*
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for (auto &mod_it : active_design->modules_)
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{
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printf("found module in design!!!\n");
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//design->add(it.second->clone());
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for (auto &wire_it : mod_it.second->wires_)
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{
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printf("found wire in module!!!\n");
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}
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for (auto &cell_it : mod_it.second->cells_)
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{
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printf("found cell in module!!!\n");
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}
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}*/
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}
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}
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@ -217,19 +185,19 @@ BOOST_PYTHON_MODULE(libyosys)
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.def("get_modules", &YosysDesign::get_modules)
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;
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class_<YosysModule>("YosysModule", init<unsigned int>())
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class_<YosysModule>("YosysModule", no_init)
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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.def("get_cells", &YosysModule::get_cells)
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.def("get_wires", &YosysModule::get_wires)
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;
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class_<YosysCell>("YosysCell", init<unsigned int>())
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class_<YosysCell>("YosysCell", no_init)
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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;
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class_<YosysWire>("YosysWire", init<unsigned int>())
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class_<YosysWire>("YosysWire", no_init)
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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;
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