mirror of https://github.com/YosysHQ/yosys.git
Added RTLIL::SigSpecConstIterator
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@ -70,6 +70,7 @@ namespace RTLIL
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struct SigChunk;
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struct SigBit;
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struct SigSpecIterator;
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struct SigSpecConstIterator;
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struct SigSpec;
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struct CaseRule;
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struct SwitchRule;
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@ -698,6 +699,16 @@ struct RTLIL::SigSpecIterator
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inline void operator++() { index++; }
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};
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struct RTLIL::SigSpecConstIterator
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{
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const RTLIL::SigSpec *sig_p;
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int index;
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inline const RTLIL::SigBit &operator*() const;
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inline bool operator!=(const RTLIL::SigSpecConstIterator &other) const { return index != other.index; }
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inline void operator++() { index++; }
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};
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struct RTLIL::SigSpec
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{
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private:
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@ -762,6 +773,9 @@ public:
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inline RTLIL::SigSpecIterator begin() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = 0; return it; }
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inline RTLIL::SigSpecIterator end() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = width_; return it; }
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inline RTLIL::SigSpecConstIterator begin() const { RTLIL::SigSpecConstIterator it; it.sig_p = this; it.index = 0; return it; }
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inline RTLIL::SigSpecConstIterator end() const { RTLIL::SigSpecConstIterator it; it.sig_p = this; it.index = width_; return it; }
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void sort();
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void sort_and_unify();
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@ -829,6 +843,10 @@ inline RTLIL::SigBit &RTLIL::SigSpecIterator::operator*() const {
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return (*sig_p)[index];
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}
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inline const RTLIL::SigBit &RTLIL::SigSpecConstIterator::operator*() const {
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return (*sig_p)[index];
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}
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inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) {
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assert(sig.size() == 1 && sig.chunks().size() == 1);
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*this = SigBit(sig.chunks().front());
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