mirror of https://github.com/YosysHQ/yosys.git
´SMT success only if simulation is equivalent
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@ -54,7 +54,6 @@ run_smt_test() {
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# TODO: which SMT solver should be run?
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if z3 "${base_name}.smt2"; then
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echo "SMT file ${base_name}.smt2 is valid ."
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smt_successful_files["$rtlil_file"]="Success"
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if python3 vcd_harness_smt.py "${base_name}.smt2"; then
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echo "Python script generated VCD file for $rtlil_file successfully."
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@ -133,6 +133,9 @@ for command in smt_commands:
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# smt_io.setup()
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result = smt_io.check_sat()
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print(f'SAT result: {result}')
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if result != 'sat':
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smt_io.p_close()
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sys.exit(1)
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value = smt_io.get(f'(Y test_outputs_step_n0)')
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print(f" Y: {value}")
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@ -197,3 +200,4 @@ def write_vcd(filename, signals, timescale='1 ns', date='today'):
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# Write the VCD file
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write_vcd(smt_file_path + '.vcd', signals)
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sys.exit(0)
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