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proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage 

Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2019-11-21 20:46:41 +00:00
parent 9e4801cca7
commit ca99b1ee8d
1 changed files with 16 additions and 4 deletions
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20
passes/proc/proc_dlatch.cc
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@ -349,6 +349,10 @@ void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc)
continue; continue;
} }
if (proc->get_bool_attribute(ID(always_ff)))
log_error("Found non edge/level sensitive event in always_ff process `%s.%s'.\n",
db.module->name.c_str(), proc->name.c_str());
for (auto ss : sr->actions) for (auto ss : sr->actions)
{ {
db.sigmap.apply(ss.first); db.sigmap.apply(ss.first);
@ -383,8 +387,12 @@ void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc)
int offset = 0; int offset = 0;
for (auto chunk : nolatches_bits.first.chunks()) { for (auto chunk : nolatches_bits.first.chunks()) {
SigSpec lhs = chunk, rhs = nolatches_bits.second.extract(offset, chunk.width); SigSpec lhs = chunk, rhs = nolatches_bits.second.extract(offset, chunk.width);
log("No latch inferred for signal `%s.%s' from process `%s.%s'.\n", if (proc->get_bool_attribute(ID(always_latch)))
db.module->name.c_str(), log_signal(lhs), db.module->name.c_str(), proc->name.c_str()); log_error("No latch inferred for signal `%s.%s' from always_latch process `%s.%s'.\n",
db.module->name.c_str(), log_signal(lhs), db.module->name.c_str(), proc->name.c_str());
else
log("No latch inferred for signal `%s.%s' from process `%s.%s'.\n",
db.module->name.c_str(), log_signal(lhs), db.module->name.c_str(), proc->name.c_str());
db.module->connect(lhs, rhs); db.module->connect(lhs, rhs);
offset += chunk.width; offset += chunk.width;
} }
@ -410,8 +418,12 @@ void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc)
cell->set_src_attribute(src); cell->set_src_attribute(src);
db.generated_dlatches.insert(cell); db.generated_dlatches.insert(cell);
log("Latch inferred for signal `%s.%s' from process `%s.%s': %s\n", if (proc->get_bool_attribute(ID(always_comb)))
db.module->name.c_str(), log_signal(lhs), db.module->name.c_str(), proc->name.c_str(), log_id(cell)); log_error("Latch inferred for signal `%s.%s' from always_comb process `%s.%s'.\n",
db.module->name.c_str(), log_signal(lhs), db.module->name.c_str(), proc->name.c_str());
else
log("Latch inferred for signal `%s.%s' from process `%s.%s': %s\n",
db.module->name.c_str(), log_signal(lhs), db.module->name.c_str(), proc->name.c_str(), log_id(cell));
} }
offset += width; offset += width;