Add comments for unproven cells.

This commit is contained in:
SergeyDegtyar 2019-09-09 08:49:29 +03:00 committed by Miodrag Milanovic
parent 2ae7dec530
commit ca7a58bcc8
3 changed files with 3 additions and 2 deletions

View File

@ -2,7 +2,7 @@ read_verilog dynamic_shift_registers_1.v
hierarchy -top dynamic_shift_register_1
proc
flatten
#ERROR: Found 1 unproven $equiv cells in 'equiv_status -assert'.
#equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check
equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check

View File

@ -2,6 +2,7 @@ read_verilog shift_registers_0.v
hierarchy -top shift_registers_0
proc
flatten
#ERROR: Found 2 unproven $equiv cells in 'equiv_status -assert'.
#equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check
equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check

View File

@ -2,7 +2,7 @@ read_verilog shift_registers_1.v
hierarchy -top shift_registers_1
proc
flatten
#ERROR: Found 2 unproven $equiv cells in 'equiv_status -assert'.
#equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check
equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check