From c921d85a852a462e6404a39bb844d92d3aca8d9b Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Mon, 18 Nov 2024 12:33:09 +0100 Subject: [PATCH] clockgate: fix test comments --- tests/techmap/clockgate.ys | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/techmap/clockgate.ys b/tests/techmap/clockgate.ys index dac4de0ec..84ccc0e92 100644 --- a/tests/techmap/clockgate.ys +++ b/tests/techmap/clockgate.ys @@ -61,7 +61,7 @@ clockgate -pos pdk_icg ce:clkin:clkout -tie_lo scanen # falling edge clock flops don't get matched on -pos select -module dffe_00 -assert-count 0 t:\\pdk_icg select -module dffe_01 -assert-count 0 t:\\pdk_icg -# falling edge clock flops do get matched on -pos +# rising edge clock flops do get matched on -pos select -module dffe_10 -assert-count 1 t:\\pdk_icg select -module dffe_11 -assert-count 1 t:\\pdk_icg # if necessary, EN is inverted, since the given ICG @@ -79,10 +79,10 @@ select -module dffe_wide_11 -assert-count 1 t:\\pdk_icg design -load before clockgate -min_net_size 1 -neg pdk_icg ce:clkin:clkout -tie_lo scanen -# rising edge clock flops don't get matched on -neg +# falling edge clock flops do get matched on -neg select -module dffe_00 -assert-count 1 t:\\pdk_icg select -module dffe_01 -assert-count 1 t:\\pdk_icg -# rising edge clock flops do get matched on -neg +# rising edge clock flops don't get matched on -neg select -module dffe_10 -assert-count 0 t:\\pdk_icg select -module dffe_11 -assert-count 0 t:\\pdk_icg # if necessary, EN is inverted, since the given ICG