mirror of https://github.com/YosysHQ/yosys.git
Added $assert support to SMV back-end
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parent
31b555ae72
commit
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@ -42,7 +42,7 @@ struct SmvWorker
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pool<Wire*> partial_assignment_wires;
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pool<Wire*> partial_assignment_wires;
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dict<SigBit, std::pair<const char*, int>> partial_assignment_bits;
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dict<SigBit, std::pair<const char*, int>> partial_assignment_bits;
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vector<string> assignments;
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vector<string> assignments, invarspecs;
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const char *cid()
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const char *cid()
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{
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{
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@ -227,6 +227,16 @@ struct SmvWorker
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{
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{
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// FIXME: $slice, $concat, $mem
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// FIXME: $slice, $concat, $mem
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if (cell->type.in("$assert"))
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{
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SigSpec sig_a = cell->getPort("\\A");
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SigSpec sig_en = cell->getPort("\\EN");
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invarspecs.push_back(stringf("!bool(%s) | bool(%s);", rvalue(sig_en), rvalue(sig_a)));
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continue;
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}
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if (cell->type.in("$shl", "$shr", "$sshl", "$sshr", "$shift", "$shiftx"))
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if (cell->type.in("$shl", "$shr", "$sshl", "$sshr", "$shift", "$shiftx"))
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{
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{
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SigSpec sig_a = cell->getPort("\\A");
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SigSpec sig_a = cell->getPort("\\A");
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@ -634,9 +644,16 @@ struct SmvWorker
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assignments.push_back(stringf("%s := %s;", cid(wire->name), expr.c_str()));
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assignments.push_back(stringf("%s := %s;", cid(wire->name), expr.c_str()));
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}
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}
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f << stringf(" ASSIGN\n");
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if (!assignments.empty()) {
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for (const string &line : assignments)
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f << stringf(" ASSIGN\n");
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f << stringf(" %s\n", line.c_str());
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for (const string &line : assignments)
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f << stringf(" %s\n", line.c_str());
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}
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if (!invarspecs.empty()) {
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for (const string &line : invarspecs)
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f << stringf(" INVARSPEC %s\n", line.c_str());
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}
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}
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}
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};
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};
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