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cxxrtl: Prevent wires with input or output ports from being aliased

This commit is contained in:
Amiot Noe 2024-05-21 21:47:00 +02:00 committed by Catherine
parent 56c843959f
commit c7580eb18e
1 changed files with 1 additions and 0 deletions
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backends/cxxrtl/cxxrtl_backend.cc
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@ -3263,6 +3263,7 @@ struct CxxrtlWorker {
debug_wire_type = wire_type; // wire is a member debug_wire_type = wire_type; // wire is a member
if (!debug_alias) continue; if (!debug_alias) continue;
if (wire->port_input || wire->port_output) continue; // preserve input/output metadata in flags
const RTLIL::Wire *it = wire; const RTLIL::Wire *it = wire;
while (flow.is_inlinable(it)) { while (flow.is_inlinable(it)) {
log_assert(flow.wire_comb_defs[it].size() == 1); log_assert(flow.wire_comb_defs[it].size() == 1);