mirror of https://github.com/YosysHQ/yosys.git
Issue a warning instead of a syntax error for blif delay constraints
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@ -256,6 +256,16 @@ void parse_blif(RTLIL::Design *design, std::istream &f, IdString dff_name, bool
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continue;
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}
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if (!strcmp(cmd, ".area") || !strcmp(cmd, ".delay") || !strcmp(cmd, ".wire_load_slope") || !strcmp(cmd, ".wire") ||
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!strcmp(cmd, ".input_arrival") || !strcmp(cmd, ".default_input_arrival") || !strcmp(cmd, ".output_required") ||
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!strcmp(cmd, ".default_output_required") || !strcmp(cmd, ".input_drive") || !strcmp(cmd, ".default_input_drive") ||
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!strcmp(cmd, ".max_input_load") || !strcmp(cmd, ".default_max_input_load") || !strcmp(cmd, ".output_load") ||
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!strcmp(cmd, ".default_output_load"))
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{
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log_warning("Blif delay constraints (%s) are not supported.", cmd);
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continue;
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}
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if (!strcmp(cmd, ".inputs") || !strcmp(cmd, ".outputs"))
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{
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char *p;
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