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Add comment about supporting $dffe in ice40_dsp
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@ -12,6 +12,7 @@ match mul
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endmatch
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match ffA
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// TODO: Support $dffe too by checking if all enable signals are identical
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select ffA->type.in($dff)
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filter !port(mul, \A).remove_const().empty()
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filter includes(port(ffA, \Q).to_sigbit_set(), port(mul, \A).remove_const().to_sigbit_set())
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