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Make genvar a signed type

This commit is contained in:
Eddie Hung 2019-06-20 16:04:12 -07:00
parent 477e566e8d
commit c27ab609fa
1 changed files with 1 additions and 0 deletions
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frontends/verilog/verilog_parser.y
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@ -517,6 +517,7 @@ wire_type_token:
TOK_GENVAR { TOK_GENVAR {
astbuf3->type = AST_GENVAR; astbuf3->type = AST_GENVAR;
astbuf3->is_reg = true; astbuf3->is_reg = true;
astbuf3->is_signed = true;
astbuf3->range_left = 31; astbuf3->range_left = 31;
astbuf3->range_right = 0; astbuf3->range_right = 0;
} | } |