Merge pull request #3650 from jix/rtlil_roundtrip_z_bits

backends/rtlil: Do not shorten a value with z bits to 'x
This commit is contained in:
Jannis Harder 2023-01-30 16:14:24 +01:00 committed by GitHub
commit c235802f4a
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 22 additions and 1 deletions

View File

@ -51,7 +51,7 @@ void RTLIL_BACKEND::dump_const(std::ostream &f, const RTLIL::Const &data, int wi
}
}
f << stringf("%d'", width);
if (data.is_fully_undef()) {
if (data.is_fully_undef_x_only()) {
f << "x";
} else {
for (int i = offset+width-1; i >= offset; i--) {

View File

@ -370,6 +370,17 @@ bool RTLIL::Const::is_fully_undef() const
return true;
}
bool RTLIL::Const::is_fully_undef_x_only() const
{
cover("kernel.rtlil.const.is_fully_undef_x_only");
for (const auto &bit : bits)
if (bit != RTLIL::State::Sx)
return false;
return true;
}
bool RTLIL::Const::is_onehot(int *pos) const
{
cover("kernel.rtlil.const.is_onehot");

View File

@ -686,6 +686,7 @@ struct RTLIL::Const
bool is_fully_ones() const;
bool is_fully_def() const;
bool is_fully_undef() const;
bool is_fully_undef_x_only() const;
bool is_onehot(int *pos = nullptr) const;
inline RTLIL::Const extract(int offset, int len = 1, RTLIL::State padding = RTLIL::State::S0) const {

View File

@ -0,0 +1,9 @@
! mkdir -p temp
read_rtlil <<EOT
module \test
wire output 1 \a
connect \a 1'z
end
EOT
write_rtlil temp/rtlil_z_bits.il
! grep -F -q "connect \\a 1'z" temp/rtlil_z_bits.il