mirror of https://github.com/YosysHQ/yosys.git
gowin: split cells_xtra by family
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98b4affc4a
commit
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@ -3,7 +3,9 @@ OBJS += techlibs/gowin/synth_gowin.o
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_map.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_map.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_sim.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_sim.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra_gw1n.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra_gw2a.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_xtra_gw5a.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/arith_map.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/arith_map.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map.v))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams.txt))
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$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams.txt))
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@ -63,16 +63,17 @@ if __name__ == '__main__':
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parser.add_argument('gowin_dir', nargs='?', default='/opt/gowin/')
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parser.add_argument('gowin_dir', nargs='?', default='/opt/gowin/')
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args = parser.parse_args()
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args = parser.parse_args()
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dirs = [
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families = {
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os.path.join(args.gowin_dir, 'IDE/simlib/gw1n/'),
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'gw1n': os.path.join(args.gowin_dir, 'IDE/simlib/gw1n/'),
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os.path.join(args.gowin_dir, 'IDE/simlib/gw2a/'),
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'gw2a': os.path.join(args.gowin_dir, 'IDE/simlib/gw2a/'),
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os.path.join(args.gowin_dir, 'IDE/simlib/gw5a/'),
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'gw5a': os.path.join(args.gowin_dir, 'IDE/simlib/gw5a/'),
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]
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}
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with open('cells_xtra.v', 'w') as fout:
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for family, dir in families.items():
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fout.write('// Created by cells_xtra.py\n')
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if not os.path.isdir(dir):
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fout.write('\n')
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print(f'{dir} is not a directory')
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for dir in dirs:
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else:
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if not os.path.isdir(dir):
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with open(f'cells_xtra_{family}.v', 'w') as fout:
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print(f'{dir} is not a directory')
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fout.write('// Created by cells_xtra.py\n')
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xtract_cells_decl(dir, fout)
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fout.write('\n')
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xtract_cells_decl(dir, fout)
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Load Diff
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Load Diff
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Load Diff
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Load Diff
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@ -86,17 +86,22 @@ struct SynthGowinPass : public ScriptPass
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log(" read/write collision\" (same result as setting the no_rw_check\n");
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log(" read/write collision\" (same result as setting the no_rw_check\n");
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log(" attribute on all memories).\n");
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log(" attribute on all memories).\n");
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log("\n");
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log("\n");
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log(" -family <family>\n");
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log(" sets the gowin family to the specified value. The default is 'gw1n'.\n");
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log(" The following families are supported:\n");
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log(" 'gw1n', 'gw2a', 'gw5a'.\n");
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log("\n");
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log("\n");
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log("The following commands are executed by this synthesis command:\n");
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log("The following commands are executed by this synthesis command:\n");
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help_script();
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help_script();
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log("\n");
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log("\n");
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}
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}
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string top_opt, vout_file, json_file;
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string top_opt, vout_file, json_file, family;
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bool retime, nobram, nolutram, flatten, nodffe, nowidelut, abc9, noiopads, noalu, no_rw_check;
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bool retime, nobram, nolutram, flatten, nodffe, nowidelut, abc9, noiopads, noalu, no_rw_check;
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void clear_flags() override
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void clear_flags() override
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{
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{
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family = "gw1n";
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top_opt = "-auto-top";
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top_opt = "-auto-top";
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vout_file = "";
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vout_file = "";
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json_file = "";
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json_file = "";
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@ -132,6 +137,10 @@ struct SynthGowinPass : public ScriptPass
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json_file = args[++argidx];
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json_file = args[++argidx];
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continue;
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continue;
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}
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}
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if (args[argidx] == "-family" && argidx+1 < args.size()) {
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family = args[++argidx];
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continue;
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}
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if (args[argidx] == "-run" && argidx+1 < args.size()) {
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if (args[argidx] == "-run" && argidx+1 < args.size()) {
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size_t pos = args[argidx+1].find(':');
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size_t pos = args[argidx+1].find(':');
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if (pos == std::string::npos)
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if (pos == std::string::npos)
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@ -210,7 +219,7 @@ struct SynthGowinPass : public ScriptPass
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if (check_label("begin"))
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if (check_label("begin"))
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{
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{
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run("read_verilog -specify -lib +/gowin/cells_sim.v");
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run("read_verilog -specify -lib +/gowin/cells_sim.v");
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run("read_verilog -specify -lib +/gowin/cells_xtra.v");
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run(stringf("read_verilog -specify -lib +/gowin/cells_xtra_%s.v", help_mode ? "<family>" : family.c_str()));
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run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
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run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
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}
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}
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