From bdc43c659262b4334694273cc6af082af4f10f81 Mon Sep 17 00:00:00 2001 From: Roland Coeurjoly Date: Wed, 21 Aug 2024 16:21:29 +0200 Subject: [PATCH] Add left and right bound properties to wire. Add test. Fix printing for signed attributes Co-authored-by: N. Engelhardt Co-authored-by: Roland Coeurjoly --- frontends/verific/verific.cc | 13 +++++++++++++ kernel/rtlil.cc | 2 +- kernel/rtlil.h | 2 +- passes/cmds/printattrs.cc | 2 +- tests/verific/bounds.vhd | 18 ++++++++++++++++++ tests/verific/bounds.ys | 6 ++++++ 6 files changed, 40 insertions(+), 3 deletions(-) create mode 100644 tests/verific/bounds.vhd create mode 100644 tests/verific/bounds.ys diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 2dd8aa095..57c3ef14e 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -450,6 +450,19 @@ void VerificImporter::import_attributes(dict &att auto type_range = nl->GetTypeRange(obj->Name()); if (!type_range) return; + if (type_range->IsTypeScalar()) { + const long long bottom_bound = type_range->GetScalarRangeLeftBound(); + const long long top_bound = type_range->GetScalarRangeRightBound(); + const unsigned bit_width = type_range->NumElements(); + RTLIL::Const bottom_const(bottom_bound, bit_width); + RTLIL::Const top_const(top_bound, bit_width); + if (bottom_bound < 0 || top_bound < 0) { + bottom_const.flags |= RTLIL::CONST_FLAG_SIGNED; + top_const.flags |= RTLIL::CONST_FLAG_SIGNED; + } + attributes.emplace(ID(bottom_bound), bottom_const); + attributes.emplace(ID(top_bound), top_const); + } if (!type_range->IsTypeEnum()) return; #ifdef VERIFIC_VHDL_SUPPORT diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index d3946a620..e208a09fd 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -213,7 +213,7 @@ RTLIL::Const::Const(const std::string &str) } } -RTLIL::Const::Const(int val, int width) +RTLIL::Const::Const(long long val, int width) { flags = RTLIL::CONST_FLAG_NONE; bits.reserve(width); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index f9da29495..03ab248fa 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -662,7 +662,7 @@ struct RTLIL::Const Const() : flags(RTLIL::CONST_FLAG_NONE) {} Const(const std::string &str); - Const(int val, int width = 32); + Const(long long val, int width = 32); Const(RTLIL::State bit, int width = 1); Const(const std::vector &bits) : bits(bits) { flags = CONST_FLAG_NONE; } Const(const std::vector &bits); diff --git a/passes/cmds/printattrs.cc b/passes/cmds/printattrs.cc index 7973ac262..6f630479d 100644 --- a/passes/cmds/printattrs.cc +++ b/passes/cmds/printattrs.cc @@ -42,7 +42,7 @@ struct PrintAttrsPass : public Pass { static void log_const(const RTLIL::IdString &s, const RTLIL::Const &x, const unsigned int indent) { if (x.flags == RTLIL::CONST_FLAG_STRING) log("%s(* %s=\"%s\" *)\n", get_indent_str(indent).c_str(), log_id(s), x.decode_string().c_str()); - else if (x.flags == RTLIL::CONST_FLAG_NONE) + else if (x.flags == RTLIL::CONST_FLAG_NONE || x.flags == RTLIL::CONST_FLAG_SIGNED) log("%s(* %s=%s *)\n", get_indent_str(indent).c_str(), log_id(s), x.as_string().c_str()); else log_assert(x.flags == RTLIL::CONST_FLAG_STRING || x.flags == RTLIL::CONST_FLAG_NONE); //intended to fail diff --git a/tests/verific/bounds.vhd b/tests/verific/bounds.vhd new file mode 100644 index 000000000..14c6c34a7 --- /dev/null +++ b/tests/verific/bounds.vhd @@ -0,0 +1,18 @@ +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; +use IEEE.NUMERIC_STD.ALL; + +entity work is + Port ( + a : in INTEGER range -5 to 10; + b : out INTEGER range -6 to 11 + ); +end entity work; + +architecture Behavioral of work is +begin + process(a) + begin + b <= a; + end process; +end architecture Behavioral; diff --git a/tests/verific/bounds.ys b/tests/verific/bounds.ys new file mode 100644 index 000000000..425af717c --- /dev/null +++ b/tests/verific/bounds.ys @@ -0,0 +1,6 @@ +read -vhdl bounds.vhd +verific -import work +select -assert-count 1 a:bottom_bound=5'bs11011 +select -assert-count 1 a:top_bound=5'bs01010 +select -assert-count 1 a:bottom_bound=5'bs11010 +select -assert-count 1 a:top_bound=5'bs01011 \ No newline at end of file