mirror of https://github.com/YosysHQ/yosys.git
add -fst-noinit flag to sim for not initializing the state from the fst file
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12a31a4418
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@ -123,6 +123,7 @@ struct SimShared
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std::vector<TriggeredAssertion> triggered_assertions;
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std::vector<TriggeredAssertion> triggered_assertions;
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std::vector<DisplayOutput> display_output;
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std::vector<DisplayOutput> display_output;
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bool serious_asserts = false;
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bool serious_asserts = false;
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bool fst_noinit = false;
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bool initstate = true;
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bool initstate = true;
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};
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};
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@ -1553,7 +1554,7 @@ struct SimWorker : SimShared
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bool did_something = top->setInputs();
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bool did_something = top->setInputs();
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if (initial) {
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if (initial) {
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did_something |= top->setInitState();
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if (!fst_noinit) did_something |= top->setInitState();
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initialize_stable_past();
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initialize_stable_past();
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initial = false;
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initial = false;
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}
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}
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@ -2688,6 +2689,10 @@ struct SimPass : public Pass {
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log(" fail the simulation command if, in the course of simulating,\n");
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log(" fail the simulation command if, in the course of simulating,\n");
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log(" any of the asserts in the design fail\n");
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log(" any of the asserts in the design fail\n");
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log("\n");
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log("\n");
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log(" -fst-noinit\n");
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log(" do not initialize latches and memories from an input FST or VCD file\n");
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log(" (use the initial defined by the design instead)\n");
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log("\n");
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log(" -q\n");
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log(" -q\n");
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log(" disable per-cycle/sample log message\n");
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log(" disable per-cycle/sample log message\n");
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log("\n");
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log("\n");
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@ -2850,6 +2855,10 @@ struct SimPass : public Pass {
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worker.serious_asserts = true;
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worker.serious_asserts = true;
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continue;
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continue;
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}
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}
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if (args[argidx] == "-fst-noinit") {
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worker.fst_noinit = true;
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continue;
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}
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if (args[argidx] == "-x") {
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if (args[argidx] == "-x") {
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worker.ignore_x = true;
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worker.ignore_x = true;
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continue;
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continue;
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