riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #2425 from whitequark/cxxrtl-meminit-constness 

cxxrtl: don't assert on non-constant $meminit inputs
This commit is contained in:
whitequark 2020-11-01 17:08:42 +00:00 committed by GitHub
parent cc7ad65a79 2ba05f5c31
commit bbaf8693c6
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
backends/cxxrtl/cxxrtl_backend.cc
View File

@ -22,6 +22,7 @@
#include "kernel/sigtools.h" #include "kernel/sigtools.h"
#include "kernel/utils.h" #include "kernel/utils.h"
#include "kernel/celltypes.h" #include "kernel/celltypes.h"
#include "kernel/mem.h"
#include "kernel/log.h" #include "kernel/log.h"
USING_YOSYS_NAMESPACE USING_YOSYS_NAMESPACE
@ -2347,8 +2348,9 @@ struct CxxrtlWorker {
if (sync->type == RTLIL::STi) if (sync->type == RTLIL::STi)
has_sync_init = true; has_sync_init = true;
for (auto cell : module->cells()) // The Mem constructor also checks for well-formedness of $meminit cells, if any.
if (cell->type == ID($mem)) for (auto &mem : Mem::get_all_memories(module))
if (mem.packed)
has_packed_mem = true; has_packed_mem = true;
} }
} }