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ecp5: Add DDRDLLA 

Signed-off-by: David Shah <davey1576@gmail.com>
This commit is contained in:
David Shah 2019-02-19 19:34:37 +00:00
parent c36f15b489
commit bb56cb738d
1 changed files with 9 additions and 0 deletions
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9
techlibs/ecp5/cells_bb.v
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@ -308,6 +308,15 @@ module DQSBUFM(
parameter GSR = "ENABLED";
endmodule
(* blackbox *)
module DDRDLLA(
input CLK, RST, UDDCNTLN, FREEZE,
output LOCK, DDRDEL, DCNTL7, DCNTL6, DCNTL5, DCNTL4, DCNTL3, DCNTL2, DCNTL1, DCNTL0
);
parameter FORCE_MAX_DELAY = "NO";
parameter GSR = "ENABLED";
endmodule
(* blackbox *)
module CLKDIVF(
input CLKI, RST, ALIGNWD,