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Some cleanups in "ignore specify parser" 

Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2019-07-03 11:22:10 +02:00
parent 04459cb30a
commit ba36567908
2 changed files with 6 additions and 80 deletions
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84
frontends/verilog/verilog_parser.y
View File

@ -1021,13 +1021,8 @@ list_of_specparam_assignments:
specparam_assignment: specparam_assignment:
ignspec_id '=' constant_mintypmax_expression ; ignspec_id '=' constant_mintypmax_expression ;
/* ignspec_opt_cond:
pulsestyle_declaration : TOK_IF '(' ignspec_expr ')' | /* empty */;
;
showcancelled_declaration :
;
*/
path_declaration : path_declaration :
simple_path_declaration ';' simple_path_declaration ';'
@ -1036,8 +1031,8 @@ path_declaration :
; ;
simple_path_declaration : simple_path_declaration :
parallel_path_description '=' path_delay_value | ignspec_opt_cond parallel_path_description '=' path_delay_value |
full_path_description '=' path_delay_value ignspec_opt_cond full_path_description '=' path_delay_value
; ;
path_delay_value : path_delay_value :
@ -1047,26 +1042,7 @@ path_delay_value :
; ;
list_of_path_delay_extra_expressions : list_of_path_delay_extra_expressions :
/* ',' path_delay_expression | ',' path_delay_expression list_of_path_delay_extra_expressions;
t_path_delay_expression
| trise_path_delay_expression ',' tfall_path_delay_expression
| trise_path_delay_expression ',' tfall_path_delay_expression ',' tz_path_delay_expression
| t01_path_delay_expression ',' t10_path_delay_expression ',' t0z_path_delay_expression ','
tz1_path_delay_expression ',' t1z_path_delay_expression ',' tz0_path_delay_expression
| t01_path_delay_expression ',' t10_path_delay_expression ',' t0z_path_delay_expression ','
tz1_path_delay_expression ',' t1z_path_delay_expression ',' tz0_path_delay_expression ','
t0x_path_delay_expression ',' tx1_path_delay_expression ',' t1x_path_delay_expression ','
tx0_path_delay_expression ',' txz_path_delay_expression ',' tzx_path_delay_expression
*/
',' path_delay_expression
| ',' path_delay_expression ',' path_delay_expression
| ',' path_delay_expression ',' path_delay_expression ','
path_delay_expression ',' path_delay_expression ',' path_delay_expression
| ',' path_delay_expression ',' path_delay_expression ','
path_delay_expression ',' path_delay_expression ',' path_delay_expression ','
path_delay_expression ',' path_delay_expression ',' path_delay_expression ','
path_delay_expression ',' path_delay_expression ',' path_delay_expression
;
specify_edge_identifier : specify_edge_identifier :
TOK_POSEDGE | TOK_NEGEDGE ; TOK_POSEDGE | TOK_NEGEDGE ;
@ -1119,56 +1095,6 @@ system_timing_args :
system_timing_arg | system_timing_arg |
system_timing_args ',' system_timing_arg ; system_timing_args ',' system_timing_arg ;
/*
t_path_delay_expression :
path_delay_expression;
trise_path_delay_expression :
path_delay_expression;
tfall_path_delay_expression :
path_delay_expression;
tz_path_delay_expression :
path_delay_expression;
t01_path_delay_expression :
path_delay_expression;
t10_path_delay_expression :
path_delay_expression;
t0z_path_delay_expression :
path_delay_expression;
tz1_path_delay_expression :
path_delay_expression;
t1z_path_delay_expression :
path_delay_expression;
tz0_path_delay_expression :
path_delay_expression;
t0x_path_delay_expression :
path_delay_expression;
tx1_path_delay_expression :
path_delay_expression;
t1x_path_delay_expression :
path_delay_expression;
tx0_path_delay_expression :
path_delay_expression;
txz_path_delay_expression :
path_delay_expression;
tzx_path_delay_expression :
path_delay_expression;
*/
path_delay_expression : path_delay_expression :
ignspec_constant_expression; ignspec_constant_expression;

2
tests/various/specify.v
View File

@ -7,7 +7,7 @@ module test (
if (EN) Q <= D; if (EN) Q <= D;
specify specify
if (EN) (CLK *> (Q : D)) = (1, 2:3:4); if (EN) (posedge CLK *> (Q : D)) = (1, 2:3:4);
$setup(D, posedge CLK &&& EN, 5); $setup(D, posedge CLK &&& EN, 5);
$hold(posedge CLK, D &&& EN, 6); $hold(posedge CLK, D &&& EN, 6);
endspecify endspecify