riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

scc to use design->selected_modules() which avoids black/white-boxes

This commit is contained in:
Eddie Hung 2020-01-06 12:36:11 -08:00
parent 4f13ab823f
commit b70e87137d
1 changed files with 25 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
passes/cmds/scc.cc
View File

@ -301,10 +301,9 @@ struct SccPass : public Pass {
RTLIL::Selection newSelection(false); RTLIL::Selection newSelection(false);
int scc_counter = 0; int scc_counter = 0;
for (auto &mod_it : design->modules_) for (auto mod : design->selected_modules())
if (design->selected(mod_it.second))
{ {
SccWorker worker(design, mod_it.second, nofeedbackMode, allCellTypes, maxDepth); SccWorker worker(design, mod, nofeedbackMode, allCellTypes, maxDepth);
if (!setAttr.empty()) if (!setAttr.empty())
{ {