mirror of https://github.com/YosysHQ/yosys.git
Add handling of verific OPER_REDUCE_NOR
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -478,6 +478,12 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr
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return true;
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return true;
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}
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}
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if (inst->Type() == OPER_REDUCE_NOR) {
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SigSpec t = module->ReduceOr(NEW_ID, IN, SIGNED);
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module->addNot(inst_name, t, net_map_at(inst->GetOutput()));
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return true;
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}
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if (inst->Type() == OPER_LESSTHAN) {
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if (inst->Type() == OPER_LESSTHAN) {
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Net *net_cin = inst->GetCin();
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Net *net_cin = inst->GetCin();
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if (net_cin->IsGnd())
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if (net_cin->IsGnd())
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