diff --git a/passes/pmgen/peepopt_muldiv_c.pmg b/passes/pmgen/peepopt_muldiv_c.pmg
index f1fd49b1d..81347e8d4 100644
--- a/passes/pmgen/peepopt_muldiv_c.pmg
+++ b/passes/pmgen/peepopt_muldiv_c.pmg
@@ -77,9 +77,13 @@ code
 		c_const_int = sign2sComplement(c_const_int, c_const.size()) * twosComplement(c_const_int, c_const.size());
     // Calculate the constant and compress the width to fit the value
 	Const const_ratio;
+	Const b_const_actual;
 	if (c_const_int == 0)
 		// Avoid division by zero
 		reject;
+	b_const_actual = b_const_int_shifted;
+    b_const_actual.compress(b_const_signed);
+
 	const_ratio = b_const_int_shifted / c_const_int;
 	const_ratio.compress(b_const_signed | c_const_signed);
 
@@ -92,7 +96,7 @@ code
 		reject;
 
 	// Check for potential mult overflow
-	if (b_const.size() + a.size() > mul_y.size()) {
+	if (b_const_actual.size() + a.size() > mul_y.size()) {
 		reject;
 	}
 
diff --git a/tests/peepopt/muldiv_c.ys b/tests/peepopt/muldiv_c.ys
index d41dcfcf8..62777caab 100644
--- a/tests/peepopt/muldiv_c.ys
+++ b/tests/peepopt/muldiv_c.ys
@@ -268,7 +268,7 @@ module top(
 	output [7:0] y,
 );
     wire [6:0] mul;
-	assign mul = a * 4'd4;
+	assign mul = a * 4'd8;
 	assign y = mul / 8'd2;
 endmodule
 EOT
@@ -278,6 +278,7 @@ select -assert-count 1 t:$mul
 select -assert-count 1 t:$div
 design -reset
 
+
 log -pop
 log -header "No transform when (a*b) and x/c fitting criteria but not connected (x != a*b)"
 log -push