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Add missing CHANGELOG entries

This commit is contained in:
Eddie Hung 2019-06-28 11:16:15 -07:00
parent 4a2a93aa06
commit b5f1bd0df1
1 changed files with 3 additions and 0 deletions
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@ -23,6 +23,9 @@ Yosys 0.8 .. Yosys 0.8-dev
- Added "muxcover -nopartial"
- Added "muxpack" pass
- Added "pmux2shiftx -norange"
- Added "synth_xilinx -nocarry"
- Added "synth_xilinx -nowidelut"
- Added "synth_ecp5 -nowidelut"
- Added "write_xaiger" backend
- Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
- Added "synth_xilinx -abc9" (experimental)