mirror of https://github.com/YosysHQ/yosys.git
Set past_d value for init state
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@ -782,6 +782,7 @@ struct SimInstance
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{
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for (auto &it : ff_database)
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{
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ff_state_t &ff = it.second;
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SigSpec qsig = it.second.data.sig_q;
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if (qsig.is_wire()) {
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IdString name = qsig.as_wire()->name;
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@ -790,6 +791,7 @@ struct SimInstance
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log_warning("Unable to find wire %s in input file.\n", (scope + "." + RTLIL::unescape_id(name)).c_str());
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if (id!=0) {
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Const fst_val = Const::from_string(shared->fst->valueOf(id));
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ff.past_d = fst_val;
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set_state(qsig, fst_val);
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}
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}
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