riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Move \init signal for non-port signals as long as internally driven

This commit is contained in:
Eddie Hung 2019-11-28 12:57:36 -08:00
parent 130d3b9639
commit b3a66dff7c
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
passes/hierarchy/submod.cc
View File

@ -175,7 +175,7 @@ struct SubmodWorker
new_wire->port_output = new_wire_port_output;
new_wire->start_offset = wire->start_offset;
new_wire->attributes = wire->attributes;
if (new_wire->port_output) {
if (!flags.is_int_driven.is_fully_zero()) {
new_wire->attributes.erase(ID(init));
auto sig = sigmap(wire);
for (int i = 0; i < GetSize(sig); i++) {