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Merge pull request #3957 from YosysHQ/ver_def_param 

Verific: add default parameters to modules
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Miodrag Milanović 2023-09-27 17:37:58 +02:00 committed by GitHub
parent d510a5fcde f193ebdded
commit b35ea8f896
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1 changed files with 8 additions and 1 deletions
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9
frontends/verific/verific.cc
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@ -1275,9 +1275,16 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
log("Importing module %s.\n", RTLIL::id2cstr(module->name));
}
import_attributes(module->attributes, nl, nl);
const char *param_name ;
const char *param_value ;
MapIter mi;
FOREACH_PARAMETER_OF_NETLIST(nl, mi, param_name, param_value) {
module->avail_parameters(RTLIL::escape_id(param_name));
module->parameter_default_values[RTLIL::escape_id(param_name)] = verific_const(param_value);
}
SetIter si;
MapIter mi, mi2;
MapIter mi2;
Port *port;
PortBus *portbus;
Net *net;