mirror of https://github.com/YosysHQ/yosys.git
Fix import of VHDL enums
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3030c2b46c
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@ -199,12 +199,19 @@ void VerificImporter::import_attributes(dict<RTLIL::IdString, RTLIL::Const> &att
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attributes.emplace(stringf("\\enum_value_%s", p+2), RTLIL::escape_id(k));
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}
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else if (nl->IsFromVhdl()) {
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// Expect "<binary>"
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// Expect "<binary>" or plain <binary>
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auto p = v;
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if (p) {
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if (*p != '"')
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p = nullptr;
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else {
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if (*p != '"') {
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auto *q = p;
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for (; *q != '\0'; q++)
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if (*q != '0' && *q != '1') {
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p = nullptr;
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break;
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}
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if (p != nullptr)
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attributes.emplace(stringf("\\enum_value_%s", p), RTLIL::escape_id(k));
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} else {
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auto *q = p+1;
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for (; *q != '"'; q++)
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if (*q != '0' && *q != '1') {
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@ -213,16 +220,20 @@ void VerificImporter::import_attributes(dict<RTLIL::IdString, RTLIL::Const> &att
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}
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if (p && *(q+1) != '\0')
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p = nullptr;
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if (p != nullptr)
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{
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auto l = strlen(p);
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auto q = (char*)malloc(l+1-2);
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strncpy(q, p+1, l-2);
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q[l-2] = '\0';
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attributes.emplace(stringf("\\enum_value_%s", q), RTLIL::escape_id(k));
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free(q);
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}
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}
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}
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if (p == nullptr)
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log_error("Expected TypeRange value '%s' to be of form \"<binary>\".\n", v);
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auto l = strlen(p);
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auto q = (char*)malloc(l+1-2);
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strncpy(q, p+1, l-2);
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q[l-2] = '\0';
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attributes.emplace(stringf("\\enum_value_%s", q), RTLIL::escape_id(k));
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free(q);
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log_error("Expected TypeRange value '%s' to be of form \"<binary>\" or <binary>.\n", v);
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}
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}
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}
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