mirror of https://github.com/YosysHQ/yosys.git
clkpart -unpart into 'finalize'
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@ -538,16 +538,14 @@ struct SynthXilinxPass : public ScriptPass
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else
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abc9_opts += " -lut +/xilinx/abc9_xc7.lut";
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run("abc9" + abc9_opts);
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run("clean");
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run("clkpart -unpart clkpart");
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}
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else {
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if (nowidelut)
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run("abc -luts 2:2,3,6:5" + string(retime ? " -dff" : ""));
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else
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run("abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : ""));
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run("clean");
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}
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run("clean");
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// This shregmap call infers fixed length shift registers after abc
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// has performed any necessary retiming
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@ -564,6 +562,9 @@ struct SynthXilinxPass : public ScriptPass
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}
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if (check_label("finalize")) {
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if (help_mode || abc9)
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run("clkpart -unpart clkpart", "(only if 'abc9')");
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bool do_iopad = iopad || (ise && !noiopad);
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if (help_mode || !noclkbuf) {
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if (help_mode || do_iopad)
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