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If direction NONE use that from first bit

This commit is contained in:
Miodrag Milanovic 2021-12-08 11:50:10 +01:00
parent d186ea7a2d
commit b06f547993
1 changed files with 7 additions and 0 deletions
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7
frontends/verific/verific.cc
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@ -1112,6 +1112,13 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
for (int i = portbus->LeftIndex();; i += portbus->IsUp() ? +1 : -1) {
if (portbus->ElementAtIndex(i) && portbus->ElementAtIndex(i)->GetNet()) {
if (portbus->GetDir() == DIR_NONE && !wire->port_input && !wire->port_output) {
Port *p = portbus->ElementAtIndex(i);
if (p->GetDir() == DIR_INOUT || p->GetDir() == DIR_IN)
wire->port_input = true;
if (p->GetDir() == DIR_INOUT || p->GetDir() == DIR_OUT)
wire->port_output = true;
}
net = portbus->ElementAtIndex(i)->GetNet();
RTLIL::SigBit bit(wire, i - wire->start_offset);
if (net_map.count(net) == 0)