mirror of https://github.com/YosysHQ/yosys.git
Fixed Makefile rules for generated share files
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parent
d5b1a90b33
commit
aedcfd6fd3
7
Makefile
7
Makefile
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@ -195,6 +195,13 @@ $(subst //,/,$(1)/$(notdir $(2))): $(2)
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$$(Q) cp "$(YOSYS_SRC)"/$(2) $(subst //,/,$(1)/$(notdir $(2)))
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endef
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define add_gen_share_file
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EXTRA_TARGETS += $(subst //,/,$(1)/$(notdir $(2)))
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$(subst //,/,$(1)/$(notdir $(2))): $(2)
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$$(P) mkdir -p $(1)
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$$(Q) cp $(2) $(subst //,/,$(1)/$(notdir $(2)))
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endef
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define add_include_file
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$(eval $(call add_share_file,$(dir share/include/$(1)),$(1)))
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endef
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@ -11,7 +11,8 @@ EXTRA_OBJS += techlibs/ice40/brams_init.mk
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.SECONDARY: techlibs/ice40/brams_init.mk
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techlibs/ice40/brams_init.mk: techlibs/ice40/brams_init.py
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$(P) cd share/ice40 && python $<
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$(Q) mkdir -p techlibs/ice40
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$(P) cd techlibs/ice40 && python $<
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$(Q) touch techlibs/ice40/brams_init.mk
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techlibs/ice40/brams_init1.vh: techlibs/ice40/brams_init.mk
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@ -24,3 +25,7 @@ $(eval $(call add_share_file,share/ice40,techlibs/ice40/cells_sim.v))
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$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams.txt))
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$(eval $(call add_share_file,share/ice40,techlibs/ice40/brams_map.v))
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$(eval $(call add_gen_share_file,share/ice40,techlibs/ice40/brams_init1.vh))
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$(eval $(call add_gen_share_file,share/ice40,techlibs/ice40/brams_init2.vh))
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$(eval $(call add_gen_share_file,share/ice40,techlibs/ice40/brams_init3.vh))
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@ -10,7 +10,8 @@ EXTRA_OBJS += techlibs/xilinx/brams_init.mk
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.SECONDARY: techlibs/xilinx/brams_init.mk
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techlibs/xilinx/brams_init.mk: techlibs/xilinx/brams_init.py
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$(P) cd share/xilinx && python $<
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$(Q) mkdir -p techlibs/xilinx
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$(P) cd techlibs/xilinx && python $<
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$(Q) touch $@
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techlibs/xilinx/brams_init_36.vh: techlibs/xilinx/brams_init.mk
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@ -28,3 +29,8 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_bb.v))
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$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_18.vh))
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$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_16.vh))
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