mirror of https://github.com/YosysHQ/yosys.git
Fix testcase
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@ -230,13 +230,14 @@ sat -verify -prove-asserts -show-ports miter
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design -load read
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design -load read
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hierarchy -top case_overlap
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hierarchy -top case_overlap
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prep
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#prep # Do not prep otherwise $pmux's overlapping entry will get removed
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proc
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design -save gold
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design -save gold
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muxpack
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muxpack
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#opt # Do not opt otherwise $pmux's overlapping entry will get removed
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opt
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stat
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stat
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select -assert-count 0 t:$mux
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select -assert-count 0 t:$mux
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select -assert-count 1 t:$pmux
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select -assert-count 2 t:$pmux
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design -stash gate
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design -stash gate
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design -import gold -as gold
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design -import gold -as gold
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design -import gate -as gate
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design -import gate -as gate
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