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Fixed $memwr/$memrd order in memory_dff

This commit is contained in:
Clifford Wolf 2014-09-16 12:40:58 +02:00
parent fa96cf4a16
commit ae02d9cb9a
1 changed files with 6 additions and 4 deletions
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8
passes/memory/memory_dff.cc
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@ -169,13 +169,15 @@ static void handle_module(RTLIL::Module *module, bool flag_wr_only)
if (cell->type == "$dff") if (cell->type == "$dff")
dff_cells.push_back(cell); dff_cells.push_back(cell);
for (auto cell : module->selected_cells()) { for (auto cell : module->selected_cells())
if (cell->type == "$memwr" && !cell->parameters["\\CLK_ENABLE"].as_bool()) if (cell->type == "$memwr" && !cell->parameters["\\CLK_ENABLE"].as_bool())
handle_wr_cell(module, dff_cells, cell); handle_wr_cell(module, dff_cells, cell);
if (!flag_wr_only && cell->type == "$memrd" && !cell->parameters["\\CLK_ENABLE"].as_bool())
if (!flag_wr_only)
for (auto cell : module->selected_cells())
if (cell->type == "$memrd" && !cell->parameters["\\CLK_ENABLE"].as_bool())
handle_rd_cell(module, dff_cells, cell); handle_rd_cell(module, dff_cells, cell);
} }
}
struct MemoryDffPass : public Pass { struct MemoryDffPass : public Pass {
MemoryDffPass() : Pass("memory_dff", "merge input/output DFFs into memories") { } MemoryDffPass() : Pass("memory_dff", "merge input/output DFFs into memories") { }