mirror of https://github.com/YosysHQ/yosys.git
Docs: Fix warnings
Changes a bunch of :doc:`/cmd/*` to :cmd:ref:`*` with the intention of changing it later to something that replicates the previous effect of displaying the commands `short_help`.
This commit is contained in:
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@ -29,8 +29,7 @@ ezSAT
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The files in ``libs/ezsat`` provide a library for simplifying generating CNF
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formulas for SAT solvers. It also contains bindings of MiniSAT. The ezSAT
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library is written by C. Wolf. It is used by the `sat` pass (see
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:doc:`/cmd/sat`).
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library is written by C. Wolf. It is used by the `sat` pass.
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fst
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---
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@ -78,4 +77,4 @@ SubCircuit
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The files in ``libs/subcircuit`` provide a library for solving the subcircuit
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isomorphism problem. It is written by C. Wolf and based on the Ullmann Subgraph
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Isomorphism Algorithm :cite:p:`UllmannSubgraphIsomorphism`. It is used by the
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extract pass (see :doc:`../cmd/extract`).
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`extract` pass.
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@ -1,5 +1,9 @@
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techlibs
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------------------
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.. TODO:: disambiguate `synth_intel` and `synth_intel_alm`
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(MAX10, Cyclone IV) and (Cyclone V, Arria V, Cyclone 10 GX) respectively
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.. autocmdgroup:: techlibs
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:members:
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@ -0,0 +1,23 @@
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#start:The following commands are executed by this synthesis command:
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#end:$
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begin:
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hierarchy -check [-top <top> | -auto-top]
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coarse:
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proc [-ifx]
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flatten (if -flatten)
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future
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opt_expr -keepdc
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opt_clean
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check
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opt -noff -keepdc
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wreduce -keepdc [-memx]
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memory_dff (if -rdff)
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memory_memx (if -memx)
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opt_clean
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memory_collect
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opt -noff -keepdc -fast
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check:
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stat
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check
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@ -70,7 +70,7 @@ At the bottom of the `help` output for
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`synth_ice40` is the complete list of commands called by this script.
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Let's start with the section labeled ``begin``:
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: begin:
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:end-before: flatten:
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@ -143,7 +143,7 @@ line refers to the line numbers of the start/end of the corresponding ``always
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@`` block. In the case of an ``initial`` block, we instead see the ``PROC``
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referring to line 0.
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To handle these, let us now introduce the next command: :doc:`/cmd/proc`. `proc`
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To handle these, let us now introduce the next command: :cmd:ref:`proc`. `proc`
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is a macro command like `synth_ice40`. Rather than modifying the design
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directly, it instead calls a series of other commands. In the case of `proc`,
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these sub-commands work to convert the behavioral logic of processes into
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@ -188,7 +188,7 @@ opt_expr <adv_opt_expr>`.
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.. note::
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:doc:`/cmd/clean` can also be called with two semicolons after any command,
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:cmd:ref:`clean` can also be called with two semicolons after any command,
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for example we could have called :yoscrypt:`opt_expr;;` instead of
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:yoscrypt:`opt_expr; clean`. You may notice some scripts will end each line
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with ``;;``. It is beneficial to run `clean` before inspecting intermediate
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@ -215,8 +215,8 @@ Note that if we tried to run this command now then we would get an error. This
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is because we already removed all of the modules other than ``addr_gen``. We
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could restart our shell session, but instead let's use two new commands:
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- :doc:`/cmd/design`, and
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- :doc:`/cmd/read_verilog`.
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- :cmd:ref:`design`, and
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- :cmd:ref:`read_verilog`.
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.. literalinclude:: /code_examples/fifo/fifo.out
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:language: doscon
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@ -251,7 +251,7 @@ our design won't run into this issue, we can skip the ``-defer``.
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We can also run `proc` now to finish off the full :ref:`synth_begin`. Because
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the design schematic is quite large, we will be showing just the data path for
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the ``rdata`` output. If you would like to see the entire design for yourself,
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you can do so with :doc:`/cmd/show`. Note that the `show` command only works
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you can do so with :cmd:ref:`show`. Note that the `show` command only works
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with a single module, so you may need to call it with :yoscrypt:`show fifo`.
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:ref:`show_intro` section in :doc:`/getting_started/scripting_intro` has more on
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how to use `show`.
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@ -283,7 +283,7 @@ Flattening
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At this stage of a synthesis flow there are a few other commands we could run.
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In `synth_ice40` we get these:
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: flatten:
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:end-before: coarse:
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@ -355,7 +355,7 @@ Part 1
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In the iCE40 flow, we start with the following commands:
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: coarse:
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:end-before: wreduce
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@ -371,7 +371,7 @@ wasting time on something we know is impossible.
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Next up is :yoscrypt:`opt -nodffe -nosdff` performing a set of simple
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optimizations on the design. This command also ensures that only a specific
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subset of FF types are included, in preparation for the next command:
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:doc:`/cmd/fsm`. Both `opt` and `fsm` are macro commands which are explored in
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:cmd:ref:`fsm`. Both `opt` and `fsm` are macro commands which are explored in
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more detail in :doc:`/using_yosys/synthesis/opt` and
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:doc:`/using_yosys/synthesis/fsm` respectively.
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@ -403,7 +403,7 @@ Part 2
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The next group of commands performs a series of optimizations:
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-at: wreduce
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:end-before: t:$mul
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@ -411,7 +411,7 @@ The next group of commands performs a series of optimizations:
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:caption: ``coarse`` section (part 2)
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:name: synth_coarse2
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First up is :doc:`/cmd/wreduce`. If we run this we get the following:
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First up is :cmd:ref:`wreduce`. If we run this we get the following:
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.. literalinclude:: /code_examples/fifo/fifo.out
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:language: doscon
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@ -432,7 +432,7 @@ the schematic and see the output of that cell has now changed.
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``rdata`` output after `wreduce`
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The next two (new) commands are :doc:`/cmd/peepopt` and :doc:`/cmd/share`.
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The next two (new) commands are :cmd:ref:`peepopt` and :cmd:ref:`share`.
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Neither of these affect our design, and they're explored in more detail in
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:doc:`/using_yosys/synthesis/opt`, so let's skip over them. :yoscrypt:`techmap
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-map +/cmp2lut.v -D LUT_WIDTH=4` optimizes certain comparison operators by
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@ -440,7 +440,7 @@ converting them to LUTs instead. The usage of `techmap` is explored more in
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:doc:`/using_yosys/synthesis/techmap_synth`.
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Our next command to run is
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:doc:`/cmd/memory_dff`.
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:cmd:ref:`memory_dff`.
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.. literalinclude:: /code_examples/fifo/fifo.out
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:language: doscon
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@ -475,7 +475,7 @@ will only be performed if called with the ``-dsp`` flag: :yoscrypt:`synth_ice40
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-dsp`. While our example has nothing that could be mapped to DSPs we can still
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take a quick look at the commands here and describe what they do.
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-at: t:$mul
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:end-before: alumacc
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@ -514,7 +514,7 @@ Part 4
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That brings us to the fourth and final part for the iCE40 synthesis flow:
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-at: alumacc
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:end-before: map_ram:
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@ -543,7 +543,7 @@ Once these cells have been inserted, the call to `opt` can combine cells which
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are now identical but may have been missed due to e.g. the difference between
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`$add` and `$sub`.
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The other new command in this part is :doc:`/cmd/memory`. `memory` is another
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The other new command in this part is :cmd:ref:`memory`. `memory` is another
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macro command which we examine in more detail in
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:doc:`/using_yosys/synthesis/memory`. For this document, let us focus just on
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the step most relevant to our example: `memory_collect`. Up until this point,
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@ -594,7 +594,7 @@ Memory blocks
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Mapping to hard memory blocks uses a combination of `memory_libmap` and
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`techmap`.
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: map_ram:
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:end-before: map_ffram:
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@ -636,7 +636,7 @@ into flip flops (the ``logic fallback``) with `memory_map`.
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.. |techlibs/ice40/brams_map.v| replace:: :file:`techlibs/ice40/brams_map.v`
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.. _techlibs/ice40/brams_map.v: https://github.com/YosysHQ/yosys/tree/main/techlibs/ice40/brams_map.v
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: map_ffram:
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:end-before: map_gates:
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@ -671,7 +671,7 @@ an explosion in cells as multi-bit `$mux` and `$adffe` are replaced with
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single-bit `$_MUX_` and `$_DFFE_PP0P_` cells, while the `$alu` is replaced with
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primitive `$_OR_` and `$_NOT_` gates and a `$lut` cell.
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: map_gates:
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:end-before: map_ffs:
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@ -700,7 +700,7 @@ mapped to hardware into gate-level primitives. This includes optimizing
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`$_MUX_` cells where one of the inputs is a constant ``1'0``, replacing it
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instead with an `$_AND_` cell.
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: map_ffs:
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:end-before: map_luts:
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@ -725,7 +725,7 @@ LUTs
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`abc`. For more on what these do, and what the difference between these two
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commands are, refer to :doc:`/using_yosys/synthesis/abc`.
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: map_luts:
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:end-before: map_cells:
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@ -742,7 +742,7 @@ commands are, refer to :doc:`/using_yosys/synthesis/abc`.
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Finally we use `techmap` to map the generic `$lut` cells to iCE40 ``SB_LUT4``
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cells.
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: map_cells:
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:end-before: check:
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@ -784,19 +784,18 @@ Final steps
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The next section of the iCE40 synth flow performs some sanity checking and final
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tidy up:
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.. literalinclude:: /cmd/synth_ice40.rst
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.. literalinclude:: /code_examples/macro_commands/synth_ice40.ys
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:language: yoscrypt
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:start-after: check:
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:end-before: blif:
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:dedent:
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:name: check
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:caption: ``check`` section
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The new commands here are:
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- :doc:`/cmd/autoname`,
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- :doc:`/cmd/stat`, and
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- :doc:`/cmd/blackbox`.
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- :cmd:ref:`autoname`,
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- :cmd:ref:`stat`, and
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- :cmd:ref:`blackbox`.
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The output from `stat` is useful for checking resource utilization; providing a
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list of cells used in the design and the number of each, as well as the number
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@ -835,9 +834,9 @@ Synthesis output
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The iCE40 synthesis flow has the following output modes available:
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- :doc:`/cmd/write_blif`,
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- :doc:`/cmd/write_edif`, and
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- :doc:`/cmd/write_json`.
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- `write_blif`,
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- `write_edif`, and
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- `write_json`.
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As an example, if we called :yoscrypt:`synth_ice40 -top fifo -json fifo.json`,
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our synthesized ``fifo`` design will be output as :file:`fifo.json`. We can
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@ -848,4 +847,4 @@ is beyond the scope of this documentation.
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.. _nextpnr: https://github.com/YosysHQ/nextpnr
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.. seealso:: :doc:`/cmd/synth_ice40`
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.. seealso:: :cmd:ref:`synth_ice40`
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@ -122,7 +122,7 @@ module.
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Detailed documentation of the select framework can be found under
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:doc:`/using_yosys/more_scripting/selections` or in the command reference at
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:doc:`/cmd/select`.
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:cmd:ref:`select`.
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.. _show_intro:
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@ -219,7 +219,7 @@ those used in options, must be a single expression instead.
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.. _GraphViz color docs: https://graphviz.org/doc/info/colors
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For all of the options available to `show`, check the command reference at
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:doc:`/cmd/show`.
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:cmd:ref:`show`.
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.. seealso:: :ref:`interactive_show` on the
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:doc:`/using_yosys/more_scripting/interactive_investigation` page.
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@ -323,9 +323,9 @@ tools).
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design into an equivalent design that is easier to analyse.
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- Commands such as `eval` and `sat` can be used to investigate the behavior of
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the circuit.
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- :doc:`/cmd/show`.
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- :doc:`/cmd/dump`.
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- :doc:`/cmd/add` and :doc:`/cmd/delete` can be used to modify and reorganize a
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- :cmd:ref:`show`.
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- :cmd:ref:`dump`.
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- :cmd:ref:`add` and :cmd:ref:`delete` can be used to modify and reorganize a
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design dynamically.
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The code used is included in the Yosys code base under
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@ -358,7 +358,7 @@ reorganizing a module in Yosys and checking the resulting circuit.
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.. figure:: /_images/code_examples/scrambler/scrambler_p02.*
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:class: width-helper invert-helper
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Analyzing the resulting circuit with :doc:`/cmd/eval`:
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Analyzing the resulting circuit with :cmd:ref:`eval`:
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.. todo:: replace inline code
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@ -1,9 +1,11 @@
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Loading a design
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~~~~~~~~~~~~~~~~
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.. TODO:: fill out this page better
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keyword: Frontends
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- :doc:`/cmd/read_verilog`
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- :doc:`/cmd/index_frontends`
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.. todo:: include ``read_verilog <<EOF``, also other methods of loading designs
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@ -37,12 +39,6 @@ keyword: Frontends
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Others:
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- :doc:`/cmd/read`
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- `GHDL plugin`_ for VHDL
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- :doc:`/cmd/read_rtlil` (direct textual representation of Yosys internal state)
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- :doc:`/cmd/read_aiger`
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- :doc:`/cmd/read_blif`
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- :doc:`/cmd/read_json`
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- :doc:`/cmd/read_liberty`
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.. _GHDL plugin: https://github.com/ghdl/ghdl-yosys-plugin
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@ -93,7 +93,7 @@ Special patterns can be used to select by object property or type. For example:
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A:blabla`
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- select all `$add` cells from the module foo: :yoscrypt:`select foo/t:$add`
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A complete list of pattern expressions can be found in :doc:`/cmd/select`.
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A complete list of pattern expressions can be found in :cmd:ref:`select`.
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Operations on selections
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~~~~~~~~~~~~~~~~~~~~~~~~
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@ -141,7 +141,7 @@ Some of the special ``%``-codes:
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- ``%i``: intersection of top two elements on stack -- pop 2, push 1
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- ``%n``: inverse of top element on stack -- pop 1, push 1
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See :doc:`/cmd/select` for the full list.
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See :cmd:ref:`select` for the full list.
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Expanding selections
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^^^^^^^^^^^^^^^^^^^^
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@ -354,7 +354,7 @@ boolean operations such as intersection (``%i``) and difference (``%d``) are
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powerful tools for extracting the relevant portions of the circuit under
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investigation.
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Again, see :doc:`/cmd/select` for full documentation of these expressions.
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Again, see :cmd:ref:`select` for full documentation of these expressions.
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Incremental selection
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^^^^^^^^^^^^^^^^^^^^^
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@ -10,7 +10,7 @@ other commands:
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:start-after: #end:
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:caption: Passes called by `fsm`
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See also :doc:`/cmd/fsm`.
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See also :doc:`/cmd/index_passes_fsm`.
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The algorithms used for FSM detection and extraction are influenced by a more
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general reported technique :cite:p:`fsmextract`.
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@ -26,7 +26,7 @@ Some quick notes:
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decoder logic and registers.
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For more information about `memory`, such as disabling certain sub commands, see
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:doc:`/cmd/memory`.
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:doc:`/cmd/index_passes_memory`.
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Example
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-------
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@ -11,8 +11,8 @@ The `opt` macro command
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The Yosys pass `opt` runs a number of simple optimizations. This includes
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removing unused signals and cells and const folding. It is recommended to run
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this pass after each major step in the synthesis script. As listed in
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:doc:`/cmd/opt`, this macro command calls the following ``opt_*`` commands:
|
||||
this pass after each major step in the synthesis script. This macro command
|
||||
calls the following ``opt_*`` commands:
|
||||
|
||||
.. literalinclude:: /code_examples/macro_commands/opt.ys
|
||||
:language: yoscrypt
|
||||
|
@ -226,7 +226,5 @@ Other optimizations
|
|||
|
||||
.. todo:: more on the other optimizations
|
||||
|
||||
- :doc:`/cmd/wreduce`
|
||||
- :doc:`/cmd/peepopt`
|
||||
- :doc:`/cmd/share`
|
||||
- Check :doc:`/cmd/index_passes_opt` for more.
|
||||
- `abc` and `abc9`, see also: :doc:`abc`.
|
||||
|
|
|
@ -17,7 +17,7 @@ commands in a sensible order:
|
|||
|
||||
After all the ``proc_*`` commands, `opt_expr` is called. This can be disabled by
|
||||
calling :yoscrypt:`proc -noopt`. For more information about `proc`, such as
|
||||
disabling certain sub commands, see :doc:`/cmd/proc`.
|
||||
disabling certain sub commands, see :doc:`/cmd/index_passes_proc`.
|
||||
|
||||
Many commands can not operate on modules with "processess" in them. Usually a
|
||||
call to `proc` is the first command in the actual synthesis procedure after
|
||||
|
|
|
@ -6,44 +6,23 @@ Synth commands
|
|||
Packaged ``synth_*`` commands
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
The following is a list of all synth commands included in Yosys for different
|
||||
platforms. Each command runs a script of sub commands specific to the platform
|
||||
being targeted. Note that not all of these scripts are actively maintained and
|
||||
may not be up-to-date.
|
||||
|
||||
- :doc:`/cmd/synth_achronix`
|
||||
- :doc:`/cmd/synth_anlogic`
|
||||
- :doc:`/cmd/synth_coolrunner2`
|
||||
- :doc:`/cmd/synth_easic`
|
||||
- :doc:`/cmd/synth_ecp5`
|
||||
- :doc:`/cmd/synth_efinix`
|
||||
- :doc:`/cmd/synth_fabulous`
|
||||
- :doc:`/cmd/synth_gatemate`
|
||||
- :doc:`/cmd/synth_gowin`
|
||||
- :doc:`/cmd/synth_greenpak4`
|
||||
- :doc:`/cmd/synth_ice40`
|
||||
- :doc:`/cmd/synth_intel` (MAX10, Cyclone IV)
|
||||
- :doc:`/cmd/synth_intel_alm` (Cyclone V, Arria V, Cyclone 10 GX)
|
||||
- :doc:`/cmd/synth_lattice`
|
||||
- :doc:`/cmd/synth_nexus`
|
||||
- :doc:`/cmd/synth_quicklogic`
|
||||
- :doc:`/cmd/synth_sf2`
|
||||
- :doc:`/cmd/synth_xilinx`
|
||||
A list of all synth commands included in Yosys for different platforms can be
|
||||
found under :doc:`/cmd/index_techlibs`. Each command runs a script of sub
|
||||
commands specific to the platform being targeted. Note that not all of these
|
||||
scripts are actively maintained and may not be up-to-date.
|
||||
|
||||
General synthesis
|
||||
~~~~~~~~~~~~~~~~~
|
||||
|
||||
In addition to the above hardware-specific synth commands, there is also
|
||||
:doc:`/cmd/prep`. This command is limited to coarse-grain synthesis, without
|
||||
:cmd:ref:`prep`. This command is limited to coarse-grain synthesis, without
|
||||
getting into any architecture-specific mappings or optimizations. Among other
|
||||
things, this is useful for design verification.
|
||||
|
||||
The following commands are executed by the `prep` command:
|
||||
|
||||
.. literalinclude:: /cmd/prep.rst
|
||||
.. literalinclude:: /code_examples/macro_commands/prep.ys
|
||||
:start-at: begin:
|
||||
:end-before: .. only:: latex
|
||||
:dedent:
|
||||
|
||||
:doc:`/getting_started/example_synth` covers most of these commands and what
|
||||
they do.
|
||||
|
|
|
@ -33,9 +33,9 @@ reader may find this map file as :file:`techlibs/common/techmap.v` in the Yosys
|
|||
source tree.
|
||||
|
||||
Additional features have been added to techmap to allow for conditional mapping
|
||||
of cells (see :doc:`/cmd/techmap`). This can for example be useful if the target
|
||||
architecture supports hardware multipliers for certain bit-widths but not for
|
||||
others.
|
||||
of cells (see :doc:`/cmd/index_passes_techmap`). This can for example be useful
|
||||
if the target architecture supports hardware multipliers for certain bit-widths
|
||||
but not for others.
|
||||
|
||||
A usual synthesis flow would first use the techmap pass to directly map some RTL
|
||||
cells to coarse-grain cells provided by the target architecture (if any) and
|
||||
|
|
|
@ -305,7 +305,10 @@ class YosysCmdDocumenter(YosysCmdGroupDocumenter):
|
|||
return False
|
||||
|
||||
def get_sourcename(self) -> str:
|
||||
return self.object.source_file
|
||||
try:
|
||||
return self.object.source_file
|
||||
except AttributeError:
|
||||
return super().get_sourcename()
|
||||
|
||||
def format_name(self) -> str:
|
||||
return self.object.name
|
||||
|
|
Loading…
Reference in New Issue