From b8365547e9ba1fb018ba66d519d6f02d6d7580a6 Mon Sep 17 00:00:00 2001 From: Alberto Gonzalez Date: Wed, 27 May 2020 04:07:34 +0000 Subject: [PATCH 1/5] misc: Add `printattrs` command. --- passes/cmds/Makefile.inc | 1 + passes/cmds/printattrs.cc | 79 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 passes/cmds/printattrs.cc diff --git a/passes/cmds/Makefile.inc b/passes/cmds/Makefile.inc index a88980eaf..53bfd40c6 100644 --- a/passes/cmds/Makefile.inc +++ b/passes/cmds/Makefile.inc @@ -39,3 +39,4 @@ OBJS += passes/cmds/bugpoint.o endif OBJS += passes/cmds/scratchpad.o OBJS += passes/cmds/logger.o +OBJS += passes/cmds/printattrs.o diff --git a/passes/cmds/printattrs.cc b/passes/cmds/printattrs.cc new file mode 100644 index 000000000..78cf1eeff --- /dev/null +++ b/passes/cmds/printattrs.cc @@ -0,0 +1,79 @@ +/* + * yosys -- Yosys Open SYnthesis Suite + * + * Copyright (C) 2020 Alberto Gonzalez + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "kernel/yosys.h" + +USING_YOSYS_NAMESPACE +PRIVATE_NAMESPACE_BEGIN + +struct PrintAttrsPass : public Pass { + PrintAttrsPass() : Pass("printattrs", "print attributes of selected objects") { } + void help() YS_OVERRIDE + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" printattrs [selection]\n"); + log("\n"); + log("Print all attributes of the selected objects.\n"); + log("\n"); + log("\n"); + } + void execute(std::vector args, RTLIL::Design *design) YS_OVERRIDE + { + size_t argidx = 1; + extra_args(args, argidx, design); + + unsigned int indent = 0; + for (auto mod : design->selected_modules()) + { + + if (design->selected_whole_module(mod)) { + log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(mod->name)); + indent += 2; + for (auto &it : mod->attributes) + log("%s(* %s=\"%s\" %s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(it.first), it.second.decode_string().c_str(), it.second.as_string().c_str()); + } + + for (auto cell : mod->selected_cells()) { + log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(cell->name)); + indent += 2; + for (auto &it : cell->attributes) { + log("%s(* %s=\"%s\" %s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(it.first), it.second.decode_string().c_str(), it.second.as_string().c_str()); + } + indent -= 2; + } + + for (auto wire : mod->selected_wires()) { + log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(wire->name)); + indent += 2; + for (auto &it : wire->attributes) { + log("%s(* %s=\"%s\" %s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(it.first), it.second.decode_string().c_str(), it.second.as_string().c_str()); + } + indent -= 2; + } + + if (design->selected_whole_module(mod)) + indent -= 2; + } + + log("\n"); + } +} PrintAttrsPass; + +PRIVATE_NAMESPACE_END From e50e4ee285e8c3989cdf983640451aebd7e6e152 Mon Sep 17 00:00:00 2001 From: Alberto Gonzalez Date: Wed, 27 May 2020 07:40:40 +0000 Subject: [PATCH 2/5] printattrs: Use `flags` to pretty-print the `RTLIL::Const` appropriately. Co-Authored-By: whitequark --- passes/cmds/printattrs.cc | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/passes/cmds/printattrs.cc b/passes/cmds/printattrs.cc index 78cf1eeff..7f86823e3 100644 --- a/passes/cmds/printattrs.cc +++ b/passes/cmds/printattrs.cc @@ -34,6 +34,16 @@ struct PrintAttrsPass : public Pass { log("\n"); log("\n"); } + + static void log_const(const RTLIL::IdString &s, const RTLIL::Const &x, const unsigned int indent) { + if (x.flags == RTLIL::CONST_FLAG_STRING) + log("%s(* %s=\"%s\" *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(s), x.decode_string().c_str()); + else if (x.flags == RTLIL::CONST_FLAG_NONE) + log("%s(* %s=%s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(s), x.as_string().c_str()); + else + log_assert(x.flags == RTLIL::CONST_FLAG_STRING || x.flags == RTLIL::CONST_FLAG_NONE); //intended to fail + } + void execute(std::vector args, RTLIL::Design *design) YS_OVERRIDE { size_t argidx = 1; @@ -42,29 +52,26 @@ struct PrintAttrsPass : public Pass { unsigned int indent = 0; for (auto mod : design->selected_modules()) { - if (design->selected_whole_module(mod)) { log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(mod->name)); indent += 2; for (auto &it : mod->attributes) - log("%s(* %s=\"%s\" %s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(it.first), it.second.decode_string().c_str(), it.second.as_string().c_str()); + log_const(it.first, it.second, indent); } for (auto cell : mod->selected_cells()) { log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(cell->name)); indent += 2; - for (auto &it : cell->attributes) { - log("%s(* %s=\"%s\" %s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(it.first), it.second.decode_string().c_str(), it.second.as_string().c_str()); - } + for (auto &it : cell->attributes) + log_const(it.first, it.second, indent); indent -= 2; } for (auto wire : mod->selected_wires()) { log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(wire->name)); indent += 2; - for (auto &it : wire->attributes) { - log("%s(* %s=\"%s\" %s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(it.first), it.second.decode_string().c_str(), it.second.as_string().c_str()); - } + for (auto &it : wire->attributes) + log_const(it.first, it.second, indent); indent -= 2; } From 6228b10c9f354afaa009491b061583e8a686fbd8 Mon Sep 17 00:00:00 2001 From: Alberto Gonzalez Date: Wed, 27 May 2020 07:58:10 +0000 Subject: [PATCH 3/5] printattrs: Add test. --- tests/various/printattr.ys | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 tests/various/printattr.ys diff --git a/tests/various/printattr.ys b/tests/various/printattr.ys new file mode 100644 index 000000000..afc6d8eb6 --- /dev/null +++ b/tests/various/printattr.ys @@ -0,0 +1,14 @@ +logger -expect log ".*cells_not_processed=[01]* .*" 1 +logger -expect log ".*src=.< Date: Wed, 27 May 2020 23:15:07 +0000 Subject: [PATCH 4/5] printattrs: Refactor indentation string building for clarity. Co-Authored-By: whitequark --- passes/cmds/printattrs.cc | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/passes/cmds/printattrs.cc b/passes/cmds/printattrs.cc index 7f86823e3..d4d57fd85 100644 --- a/passes/cmds/printattrs.cc +++ b/passes/cmds/printattrs.cc @@ -35,11 +35,17 @@ struct PrintAttrsPass : public Pass { log("\n"); } + static std::string get_indent_str(const unsigned int indent) { + //Build the format string (e.g. "%4s") + std::string format_str = stringf("%%%ds", indent); + return stringf(format_str.c_str(), " "); //Use the format string with " " as %s + } + static void log_const(const RTLIL::IdString &s, const RTLIL::Const &x, const unsigned int indent) { if (x.flags == RTLIL::CONST_FLAG_STRING) - log("%s(* %s=\"%s\" *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(s), x.decode_string().c_str()); + log("%s(* %s=\"%s\" *)\n", get_indent_str(indent).c_str(), log_id(s), x.decode_string().c_str()); else if (x.flags == RTLIL::CONST_FLAG_NONE) - log("%s(* %s=%s *)\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(s), x.as_string().c_str()); + log("%s(* %s=%s *)\n", get_indent_str(indent).c_str(), log_id(s), x.as_string().c_str()); else log_assert(x.flags == RTLIL::CONST_FLAG_STRING || x.flags == RTLIL::CONST_FLAG_NONE); //intended to fail } @@ -53,14 +59,14 @@ struct PrintAttrsPass : public Pass { for (auto mod : design->selected_modules()) { if (design->selected_whole_module(mod)) { - log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(mod->name)); + log("%s%s\n", get_indent_str(indent).c_str(), log_id(mod->name)); indent += 2; for (auto &it : mod->attributes) log_const(it.first, it.second, indent); } for (auto cell : mod->selected_cells()) { - log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(cell->name)); + log("%s%s\n", get_indent_str(indent).c_str(), log_id(cell->name)); indent += 2; for (auto &it : cell->attributes) log_const(it.first, it.second, indent); @@ -68,7 +74,7 @@ struct PrintAttrsPass : public Pass { } for (auto wire : mod->selected_wires()) { - log("%s%s\n", stringf(stringf("%%%ds", indent).c_str(), " ").c_str(), log_id(wire->name)); + log("%s%s\n", get_indent_str(indent).c_str(), log_id(wire->name)); indent += 2; for (auto &it : wire->attributes) log_const(it.first, it.second, indent); From 5896ffd56f8d0653c9f7a71f18570d093fe669e8 Mon Sep 17 00:00:00 2001 From: Alberto Gonzalez Date: Thu, 28 May 2020 05:30:00 +0000 Subject: [PATCH 5/5] printattrs: Simplify `get_indent_str()`. Co-Authored-By: Xiretza --- passes/cmds/printattrs.cc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/passes/cmds/printattrs.cc b/passes/cmds/printattrs.cc index d4d57fd85..80dbfa259 100644 --- a/passes/cmds/printattrs.cc +++ b/passes/cmds/printattrs.cc @@ -36,9 +36,7 @@ struct PrintAttrsPass : public Pass { } static std::string get_indent_str(const unsigned int indent) { - //Build the format string (e.g. "%4s") - std::string format_str = stringf("%%%ds", indent); - return stringf(format_str.c_str(), " "); //Use the format string with " " as %s + return stringf("%*s", indent, ""); } static void log_const(const RTLIL::IdString &s, const RTLIL::Const &x, const unsigned int indent) {